diff options
| author | Yadwinder Singh Brar | 2013-06-11 11:31:12 +0200 |
|---|---|---|
| committer | Mike Turquette | 2013-08-02 22:22:09 +0200 |
| commit | 3ff6e0d8d64d594a551b5c4904e4b617bf7eee22 (patch) | |
| tree | f0eaf7340c495e131a1b1c2e083b1af224f434af /drivers/clk/samsung/clk-exynos5420.c | |
| parent | clk: samsung: Remove unused pll registeration code for pll35xx and pll36xx (diff) | |
| download | kernel-qcow2-linux-3ff6e0d8d64d594a551b5c4904e4b617bf7eee22.tar.gz kernel-qcow2-linux-3ff6e0d8d64d594a551b5c4904e4b617bf7eee22.tar.xz kernel-qcow2-linux-3ff6e0d8d64d594a551b5c4904e4b617bf7eee22.zip | |
clk: samsung: Add support to register rate_table for samsung plls
This patch defines a common rate_table which will contain recommended p, m, s,
k values for supported rates that needs to be changed for changing
corresponding PLL's rate.
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Yadwinder Singh Brar <yadi.brar@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/samsung/clk-exynos5420.c')
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5420.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 3dbe7a33297e..ca352695a954 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -729,27 +729,27 @@ static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { struct __initdata samsung_pll_clock exynos5420_plls[nr_plls] = { [apll] = PLL(pll_2550, fout_apll, "fout_apll", "fin_pll", APLL_LOCK, - APLL_CON0), + APLL_CON0, NULL), [cpll] = PLL(pll_2550, fout_mpll, "fout_mpll", "fin_pll", MPLL_LOCK, - MPLL_CON0), + MPLL_CON0, NULL), [dpll] = PLL(pll_2550, fout_dpll, "fout_dpll", "fin_pll", DPLL_LOCK, - DPLL_CON0), + DPLL_CON0, NULL), [epll] = PLL(pll_2650, fout_epll, "fout_epll", "fin_pll", EPLL_LOCK, - EPLL_CON0), + EPLL_CON0, NULL), [rpll] = PLL(pll_2650, fout_rpll, "fout_rpll", "fin_pll", RPLL_LOCK, - RPLL_CON0), + RPLL_CON0, NULL), [ipll] = PLL(pll_2550, fout_ipll, "fout_ipll", "fin_pll", IPLL_LOCK, - IPLL_CON0), + IPLL_CON0, NULL), [spll] = PLL(pll_2550, fout_spll, "fout_spll", "fin_pll", SPLL_LOCK, - SPLL_CON0), + SPLL_CON0, NULL), [vpll] = PLL(pll_2550, fout_vpll, "fout_vpll", "fin_pll", VPLL_LOCK, - VPLL_CON0), + VPLL_CON0, NULL), [mpll] = PLL(pll_2550, fout_mpll, "fout_mpll", "fin_pll", MPLL_LOCK, - MPLL_CON0), + MPLL_CON0, NULL), [bpll] = PLL(pll_2550, fout_bpll, "fout_bpll", "fin_pll", BPLL_LOCK, - BPLL_CON0), + BPLL_CON0, NULL), [kpll] = PLL(pll_2550, fout_kpll, "fout_kpll", "fin_pll", KPLL_LOCK, - KPLL_CON0), + KPLL_CON0, NULL), }; static __initdata struct of_device_id ext_clk_match[] = { |