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| author | Dmitry Osipenko | 2018-05-08 18:26:06 +0200 |
|---|---|---|
| committer | Thierry Reding | 2018-05-18 12:35:28 +0200 |
| commit | 5d797111afe12e488e08432fd9b372fae2cc7e93 (patch) | |
| tree | 751a43c080fac85db67764450a877abe33494ccf /drivers/clk/tegra/clk-tegra124.c | |
| parent | clk: tegra20: Correct parents of CDEV1/2 clocks (diff) | |
| download | kernel-qcow2-linux-5d797111afe12e488e08432fd9b372fae2cc7e93.tar.gz kernel-qcow2-linux-5d797111afe12e488e08432fd9b372fae2cc7e93.tar.xz kernel-qcow2-linux-5d797111afe12e488e08432fd9b372fae2cc7e93.zip | |
clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20
CDEV1 and CDEV2 clocks are a bit special case, their parent clock is
created by the pinctrl driver. It should be possible for clk user to
request these clocks before pinctrl driver got probed and hence user will
get an orphaned clock. That might be undesirable because user may expect
parent clock to be enabled by the child, so let's return -EPROBE_DEFER
till parent clock appears.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra124.c')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra124.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index 50088e976611..0c69c7970950 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -1479,7 +1479,7 @@ static void __init tegra124_132_clock_init_post(struct device_node *np) &pll_x_params); tegra_init_special_resets(1, tegra124_reset_assert, tegra124_reset_deassert); - tegra_add_of_provider(np); + tegra_add_of_provider(np, of_clk_src_onecell_get); clks[TEGRA124_CLK_EMC] = tegra_clk_register_emc(clk_base, np, &emc_lock); |