diff options
| author | Thierry Reding | 2015-04-20 14:38:39 +0200 |
|---|---|---|
| committer | Thierry Reding | 2016-04-28 12:41:45 +0200 |
| commit | 7e14f22305b09bd57fc2da3bf2fd3bfd53dc285b (patch) | |
| tree | 9d297aa7a3bf983a6c91fa103b7e0b7817e2e819 /drivers/clk/tegra/clk.c | |
| parent | clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs (diff) | |
| download | kernel-qcow2-linux-7e14f22305b09bd57fc2da3bf2fd3bfd53dc285b.tar.gz kernel-qcow2-linux-7e14f22305b09bd57fc2da3bf2fd3bfd53dc285b.tar.xz kernel-qcow2-linux-7e14f22305b09bd57fc2da3bf2fd3bfd53dc285b.zip | |
clk: tegra: Constify peripheral clock registers
The peripheral clock registers are defined in static tables. These
tables never need to be modified at runtime, so they can reside in
read-only memory.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk.c')
| -rw-r--r-- | drivers/clk/tegra/clk.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c index 2a3a4fe803d6..98e65ca9f925 100644 --- a/drivers/clk/tegra/clk.c +++ b/drivers/clk/tegra/clk.c @@ -84,7 +84,7 @@ static int (*special_reset_assert)(unsigned long); static int (*special_reset_deassert)(unsigned long); static unsigned int num_special_reset; -static struct tegra_clk_periph_regs periph_regs[] = { +static const struct tegra_clk_periph_regs periph_regs[] = { [0] = { .enb_reg = CLK_OUT_ENB_L, .enb_set_reg = CLK_OUT_ENB_SET_L, @@ -182,7 +182,7 @@ static int tegra_clk_rst_deassert(struct reset_controller_dev *rcdev, return -EINVAL; } -struct tegra_clk_periph_regs *get_reg_bank(int clkid) +const struct tegra_clk_periph_regs *get_reg_bank(int clkid) { int reg_bank = clkid / 32; |