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| author | Peter De Schrijver | 2017-02-23 11:44:44 +0100 |
|---|---|---|
| committer | Thierry Reding | 2017-03-20 14:06:09 +0100 |
| commit | e589376dab0753bc24c20867cd4f65290ff76381 (patch) | |
| tree | 5fd35502fa958cef21f0bba3acaf59dd2af2a54a /drivers/clk/tegra/clk.h | |
| parent | clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculation (diff) | |
| download | kernel-qcow2-linux-e589376dab0753bc24c20867cd4f65290ff76381.tar.gz kernel-qcow2-linux-e589376dab0753bc24c20867cd4f65290ff76381.tar.xz kernel-qcow2-linux-e589376dab0753bc24c20867cd4f65290ff76381.zip | |
clk: tegra: Fix type for m field
When used as part of fractional ndiv calculations, the current range is
not enough because the denominator of the fraction is multiplied with m.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk.h')
| -rw-r--r-- | drivers/clk/tegra/clk.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 6ba82ecffd4d..a62ea736398f 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -116,7 +116,7 @@ struct tegra_clk_pll_freq_table { unsigned long input_rate; unsigned long output_rate; u32 n; - u16 m; + u32 m; u8 p; u8 cpcon; u16 sdm_data; |