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author | Nicolai Hähnle | 2018-04-12 16:34:19 +0200 |
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committer | Alex Deucher | 2018-05-15 20:43:49 +0200 |
commit | 38610f15a7ad7a914e4fd0a9a5a6c386700b8ba0 (patch) | |
tree | 1625c9be4893e7057a47487dcc9ee8ede676c058 /drivers/dma-buf/dma-buf.c | |
parent | drm/amdgpu: bo could be null when access in vm bo update (diff) | |
download | kernel-qcow2-linux-38610f15a7ad7a914e4fd0a9a5a6c386700b8ba0.tar.gz kernel-qcow2-linux-38610f15a7ad7a914e4fd0a9a5a6c386700b8ba0.tar.xz kernel-qcow2-linux-38610f15a7ad7a914e4fd0a9a5a6c386700b8ba0.zip |
drm/amdgpu: set COMPUTE_PGM_RSRC1 for SGPR/VGPR clearing shaders
Otherwise, the SQ may skip some of the register writes, or shader waves may
be allocated where we don't expect them, so that as a result we don't actually
reset all of the register SRAMs. This can lead to spurious ECC errors later on
if a shader uses an uninitialized register.
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/dma-buf/dma-buf.c')
0 files changed, 0 insertions, 0 deletions