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author | Shun-Chih Yu | 2018-10-18 09:49:11 +0200 |
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committer | Vinod Koul | 2018-11-11 10:45:18 +0100 |
commit | b1f01e48df5a3454b88c5ff1eb4501f685351c67 (patch) | |
tree | cbf1221de776914f0c9fa6f5a5d98da1cd7557a9 /drivers/dma/mediatek/Kconfig | |
parent | Linux 4.20-rc1 (diff) | |
download | kernel-qcow2-linux-b1f01e48df5a3454b88c5ff1eb4501f685351c67.tar.gz kernel-qcow2-linux-b1f01e48df5a3454b88c5ff1eb4501f685351c67.tar.xz kernel-qcow2-linux-b1f01e48df5a3454b88c5ff1eb4501f685351c67.zip |
dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for MT6765 SoC
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated
to memory-to-memory transfer through queue based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
extended to support 32 virtual channels for multiple dma users to issue
dma requests onto the CQDMA simultaneously.
Signed-off-by: Shun-Chih Yu <shun-chih.yu@mediatek.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/mediatek/Kconfig')
-rw-r--r-- | drivers/dma/mediatek/Kconfig | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/dma/mediatek/Kconfig b/drivers/dma/mediatek/Kconfig index 27bac0bba09e..680fc0572d87 100644 --- a/drivers/dma/mediatek/Kconfig +++ b/drivers/dma/mediatek/Kconfig @@ -11,3 +11,16 @@ config MTK_HSDMA This controller provides the channels which is dedicated to memory-to-memory transfer to offload from CPU through ring- based descriptor management. + +config MTK_CQDMA + tristate "MediaTek Command-Queue DMA controller support" + depends on ARCH_MEDIATEK || COMPILE_TEST + select DMA_ENGINE + select DMA_VIRTUAL_CHANNELS + select ASYNC_TX_ENABLE_CHANNEL_SWITCH + help + Enable support for Command-Queue DMA controller on MediaTek + SoCs. + + This controller provides the channels which is dedicated to + memory-to-memory transfer to offload from CPU. |