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authorGregory CLEMENT2016-04-29 09:49:06 +0200
committerVinod Koul2016-05-03 08:57:47 +0200
commitdd130c652cb745e82b70cb71a3cf2dd876295e96 (patch)
treee4e8f99051df614ec14c8143e7e2cde78b0c4f06 /drivers/dma/mv_xor.h
parentdmaengine: mv_xor: make the code 64 bits compliant (diff)
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dmaengine: mv_xor: use SoC type instead of directly the operation mode
Currently the main difference between legacy XOR engine and newer one, is the way the engine modes are setup (either in the descriptor or through the controller registers). In order to be able to take into account new generation of the XOR engine for the ARM64 SoC, we need to identify them by type, and then depending to the type the engine setup will be selected. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/mv_xor.h')
-rw-r--r--drivers/dma/mv_xor.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/dma/mv_xor.h b/drivers/dma/mv_xor.h
index c19fe30e5ae9..bf56e082e7cd 100644
--- a/drivers/dma/mv_xor.h
+++ b/drivers/dma/mv_xor.h
@@ -85,6 +85,7 @@ struct mv_xor_device {
void __iomem *xor_high_base;
struct clk *clk;
struct mv_xor_chan *channels[MV_XOR_MAX_CHANNELS];
+ int xor_type;
};
/**