diff options
| author | Lee Jones | 2013-05-15 11:51:25 +0200 |
|---|---|---|
| committer | Linus Walleij | 2013-05-23 21:13:19 +0200 |
| commit | 57e65ad77fef1b026f5bdf1cd417bb6346b24fdf (patch) | |
| tree | c7683a8e0c9464bedd0cdea1d03c54a610e9c4e1 /drivers/dma/ste_dma40.c | |
| parent | dmaengine: ste_dma40: Separate Logical Global Interrupt Mask (GIM) unmasking (diff) | |
| download | kernel-qcow2-linux-57e65ad77fef1b026f5bdf1cd417bb6346b24fdf.tar.gz kernel-qcow2-linux-57e65ad77fef1b026f5bdf1cd417bb6346b24fdf.tar.xz kernel-qcow2-linux-57e65ad77fef1b026f5bdf1cd417bb6346b24fdf.zip | |
dmaengine: ste_dma40: Remove unnecessary call to d40_phy_cfg()
The majority of configuration done in d40_phy_config() pertains
to physical channels. Move the call over to runtime config which
has different code paths for physical and logical channels already,
and make it an exclusive physical channel config function as the
name implies, and drop the is_log argument.
Since we moved the call to runtime_config() it only gets called
for device transfers, so encode the small snippet of configuration
pertaining to memcpy channels into the d40_config_memcpy()
function.
Acked-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[rewrote the commit message]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/dma/ste_dma40.c')
| -rw-r--r-- | drivers/dma/ste_dma40.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 759293e4a1cc..b7fe46bd6a8e 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -2043,6 +2043,14 @@ static int d40_config_memcpy(struct d40_chan *d40c) } else if (dma_has_cap(DMA_MEMCPY, cap) && dma_has_cap(DMA_SLAVE, cap)) { d40c->dma_cfg = dma40_memcpy_conf_phy; + + /* Generate interrrupt at end of transfer or relink. */ + d40c->dst_def_cfg |= BIT(D40_SREG_CFG_TIM_POS); + + /* Generate interrupt on error. */ + d40c->src_def_cfg |= BIT(D40_SREG_CFG_EIM_POS); + d40c->dst_def_cfg |= BIT(D40_SREG_CFG_EIM_POS); + } else { chan_err(d40c, "No memcpy\n"); return -EINVAL; @@ -2496,9 +2504,6 @@ static int d40_alloc_chan_resources(struct dma_chan *chan) } pm_runtime_get_sync(d40c->base->dev); - /* Fill in basic CFG register values */ - d40_phy_cfg(&d40c->dma_cfg, &d40c->src_def_cfg, - &d40c->dst_def_cfg, chan_is_logical(d40c)); d40_set_prio_realtime(d40c); @@ -2862,8 +2867,7 @@ static int d40_set_runtime_config(struct dma_chan *chan, if (chan_is_logical(d40c)) d40_log_cfg(cfg, &d40c->log_def.lcsp1, &d40c->log_def.lcsp3); else - d40_phy_cfg(cfg, &d40c->src_def_cfg, - &d40c->dst_def_cfg, false); + d40_phy_cfg(cfg, &d40c->src_def_cfg, &d40c->dst_def_cfg); /* These settings will take precedence later */ d40c->runtime_addr = config_addr; |