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| author | Mauro Carvalho Chehab | 2013-03-11 13:28:48 +0100 |
|---|---|---|
| committer | Borislav Petkov | 2013-03-16 06:32:30 +0100 |
| commit | 9713faecff3d071de1208b081d4943b002e9cb1c (patch) | |
| tree | b6ab68f15527eae952a407aa604607aca719a5ba /drivers/edac/edac_mc_sysfs.c | |
| parent | amd64_edac: Correct DIMM sizes (diff) | |
| download | kernel-qcow2-linux-9713faecff3d071de1208b081d4943b002e9cb1c.tar.gz kernel-qcow2-linux-9713faecff3d071de1208b081d4943b002e9cb1c.tar.xz kernel-qcow2-linux-9713faecff3d071de1208b081d4943b002e9cb1c.zip | |
EDAC: Merge mci.mem_is_per_rank with mci.csbased
Both mci.mem_is_per_rank and mci.csbased denote the same thing: the
memory controller is csrows based. Merge both fields into one.
There's no need for the driver to actually fill it, as the core detects
it by checking if one of the layers has the csrows type as part of the
memory hierarchy:
if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT)
per_rank = true;
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac/edac_mc_sysfs.c')
| -rw-r--r-- | drivers/edac/edac_mc_sysfs.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c index 4c50a4760db7..5899a76eec3b 100644 --- a/drivers/edac/edac_mc_sysfs.c +++ b/drivers/edac/edac_mc_sysfs.c @@ -609,7 +609,7 @@ static int edac_create_dimm_object(struct mem_ctl_info *mci, device_initialize(&dimm->dev); dimm->dev.parent = &mci->dev; - if (mci->mem_is_per_rank) + if (mci->csbased) dev_set_name(&dimm->dev, "rank%d", index); else dev_set_name(&dimm->dev, "dimm%d", index); |