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authorBjorn Andersson2016-06-17 19:40:43 +0200
committerAndy Gross2016-06-25 05:53:52 +0200
commitdd4fe5b292226f2459305965c960d8dc39f36e0f (patch)
tree5a9ec8e6bbaa32cb2c518aad547892a48a0af58d /drivers/firmware/qcom_scm.h
parentfirmware: qcom: scm: Peripheral Authentication Service (diff)
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firmware: qcom: scm: Expose PAS command 10 as reset-controller
PAS command 10 is used to assert and deassert the MSS reset via TrustZone, expose this as a reset-controller to mimic the direct access case. Cc: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'drivers/firmware/qcom_scm.h')
-rw-r--r--drivers/firmware/qcom_scm.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
index 1a16ff925d6d..3584b00fe7e6 100644
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -46,6 +46,7 @@ extern void __qcom_scm_init(void);
#define QCOM_SCM_PAS_AUTH_AND_RESET_CMD 0x5
#define QCOM_SCM_PAS_SHUTDOWN_CMD 0x6
#define QCOM_SCM_PAS_IS_SUPPORTED_CMD 0x7
+#define QCOM_SCM_PAS_MSS_RESET 0xa
extern bool __qcom_scm_pas_supported(struct device *dev, u32 peripheral);
extern int __qcom_scm_pas_init_image(struct device *dev, u32 peripheral,
dma_addr_t metadata_phys);
@@ -53,6 +54,7 @@ extern int __qcom_scm_pas_mem_setup(struct device *dev, u32 peripheral,
phys_addr_t addr, phys_addr_t size);
extern int __qcom_scm_pas_auth_and_reset(struct device *dev, u32 peripheral);
extern int __qcom_scm_pas_shutdown(struct device *dev, u32 peripheral);
+extern int __qcom_scm_pas_mss_reset(struct device *dev, bool reset);
/* common error codes */
#define QCOM_SCM_V2_EBUSY -12