Merge branch 'drm-next-4.14' of git://people.freedesktop.org/~agd5f/linux into drm-next

More changes for 4.14.  Highlights:
- command submission overhead improvements
- Huge page support for vega10
- physical mode support for mjpeg for asics that don't support UVD vm
- improve ttm_mem_type_manager_func debug
- misc ttm fixes, cleanups
- misc gpuvm cleanups

* 'drm-next-4.14' of git://people.freedesktop.org/~agd5f/linux: (26 commits)
  drm/ttm: use reservation_object_trylock in ttm_bo_individualize_resv v2
  drm/amdgpu: fix vega10 graphic hang issue in S3 test
  drm/amdgpu: bump version for support of UVD MJPEG decode
  drm/amdgpu: add MJPEG check for UVD physical mode msg buffer
  drm/ttm: Fix accounting error when fail to get pages for pool
  drm/amd/amdgpu: expose fragment size as module parameter (v2)
  drm/amd/amdgpu: store fragment_size in vm_manager
  drm/amdgpu: rename VM invalidated to moved
  drm/amdgpu: separate bo_va structure
  drm/amdgpu: drop the extra VM huge page flag v2
  drm/amdgpu: remove superflous amdgpu_bo_kmap in the VM
  drm/amdgpu: cleanup static CSA handling
  drm/amdgpu: SHADOW and VRAM_CONTIGUOUS flags shouldn't be used by userspace
  drm/amdgpu: save list length when fence is signaled
  drm/amdgpu: move vram usage tracking into the vram manager v2
  drm/amdgpu: move gtt usage tracking into the gtt manager v2
  drm/amdgpu: move debug print into the MM managers
  drm/amdgpu: fix incorrect use of the lru_lock
  drm/radeon: fix incorrect use of the lru_lock
  drm/ttm: make ttm_mem_type_manager_func debug more useful
  ...

1 files changed, 6 insertions, 4 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 4a9e84062874..e42c1ad3af5e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -562,7 +562,7 @@ static void gmc_v7_0_set_prt(struct amdgpu_device *adev, bool enable)
 static int gmc_v7_0_gart_enable(struct amdgpu_device *adev)
 {
 	int r, i;
-	u32 tmp;
+	u32 tmp, field;
 
 	if (adev->gart.robj == NULL) {
 		dev_err(adev->dev, "No VRAM object for PCIE GART.\n");
@@ -592,10 +592,12 @@ static int gmc_v7_0_gart_enable(struct amdgpu_device *adev)
 	tmp = REG_SET_FIELD(0, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
 	WREG32(mmVM_L2_CNTL2, tmp);
+
+	field = adev->vm_manager.fragment_size;
 	tmp = RREG32(mmVM_L2_CNTL3);
 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY, 1);
-	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 4);
-	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_FRAGMENT_SIZE, 4);
+	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field);
+	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_FRAGMENT_SIZE, field);
 	WREG32(mmVM_L2_CNTL3, tmp);
 	/* setup context0 */
 	WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->mc.gart_start >> 12);
@@ -948,7 +950,7 @@ static int gmc_v7_0_sw_init(void *handle)
 	 * Currently set to 4GB ((1 << 20) 4k pages).
 	 * Max GPUVM size for cayman and SI is 40 bits.
 	 */
-	amdgpu_vm_adjust_size(adev, 64);
+	amdgpu_vm_adjust_size(adev, 64, 4);
 	adev->vm_manager.max_pfn = adev->vm_manager.vm_size << 18;
 
 	/* Set the internal MC address mask