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author | Wenjing Liu | 2019-05-06 20:22:39 +0200 |
---|---|---|
committer | Alex Deucher | 2019-06-22 16:34:12 +0200 |
commit | ba32c50f04466463258546a8e75ff8ddd6776bd5 (patch) | |
tree | 7ea80d48af1865c9cf13434c50bf60ff9ba3ea72 /drivers/gpu/drm/amd/display/dc/core/dc_link.c | |
parent | drm/amd/display: always use 4 dp lanes for dml (diff) | |
download | kernel-qcow2-linux-ba32c50f04466463258546a8e75ff8ddd6776bd5.tar.gz kernel-qcow2-linux-ba32c50f04466463258546a8e75ff8ddd6776bd5.tar.xz kernel-qcow2-linux-ba32c50f04466463258546a8e75ff8ddd6776bd5.zip |
drm/amd/display: decouple dsc adjustment out of enablement
[why]
dsc adjustment is allowed via stream update sequence.
dsc enablement is only allowed via commit stream sequence.
with the current unified dsc set function, it is hard
to determine which sequence it is called by.
The solution is to decouple dsc adjustment out of enablement
sequence so we can handle them separately.
[how]
decouple dsc adjustment out of enablement.
Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/core/dc_link.c')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 511877974315..4c31930f1cdf 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -2817,7 +2817,7 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option) disable_link(pipe_ctx->stream->link, pipe_ctx->stream->signal); #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT - if (pipe_ctx->stream->is_dsc_enabled && + if (pipe_ctx->stream->timing.flags.DSC && dc_is_dp_signal(pipe_ctx->stream->signal)) { dp_set_dsc_enable(pipe_ctx, false); } |