diff options
| author | Dmytro Laktyushkin | 2017-05-02 23:29:48 +0200 |
|---|---|---|
| committer | Alex Deucher | 2017-09-27 00:07:01 +0200 |
| commit | 9037d802a97812cb8d614b48f817a5532cf1558c (patch) | |
| tree | f3cfa77ff65c30a08def6759aeb7f28e70d76587 /drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c | |
| parent | drm/amd/display: prevent assert on error of 1 in calc_freesync_range (diff) | |
| download | kernel-qcow2-linux-9037d802a97812cb8d614b48f817a5532cf1558c.tar.gz kernel-qcow2-linux-9037d802a97812cb8d614b48f817a5532cf1558c.tar.xz kernel-qcow2-linux-9037d802a97812cb8d614b48f817a5532cf1558c.zip | |
drm/amd/display: refactor bw related variable structure in val_ctx
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c index 30c197f378dc..843f50a08e21 100644 --- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c @@ -114,7 +114,7 @@ static void dce100_pplib_apply_display_requirements( pp_display_cfg->avail_mclk_switch_time_us = dce110_get_min_vblank_time_us(context); - pp_display_cfg->min_memory_clock_khz = context->bw_results.required_yclk + pp_display_cfg->min_memory_clock_khz = context->bw.dce.yclk_khz / MEMORY_TYPE_MULTIPLIER; dce110_fill_display_configs(context, pp_display_cfg); @@ -131,12 +131,11 @@ void dce100_set_bandwidth( struct validate_context *context, bool decrease_allowed) { - if (decrease_allowed || context->dispclk_khz > dc->current_context->dispclk_khz) { + if (decrease_allowed || context->bw.dce.dispclk_khz > dc->current_context->bw.dce.dispclk_khz) { dc->res_pool->display_clock->funcs->set_clock( dc->res_pool->display_clock, - context->dispclk_khz * 115 / 100); - dc->current_context->bw_results.dispclk_khz = context->dispclk_khz; - dc->current_context->dispclk_khz = context->dispclk_khz; + context->bw.dce.dispclk_khz * 115 / 100); + dc->current_context->bw.dce.dispclk_khz = context->bw.dce.dispclk_khz; } dce100_pplib_apply_display_requirements(dc, context); } |