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authorZeyu Fan2017-07-25 21:14:24 +0200
committerAlex Deucher2017-09-27 00:15:43 +0200
commit3639fa68122154b453eeaac840daadf3c7c56db4 (patch)
treea2b8935faa4f9d83dd07110f94d6baf41ce6205a /drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
parentdrm/amd/display: move ocsc programming from opp to dpp (diff)
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drm/amd/display: Clean up some DCN1 guards
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index aa4777a8ec36..119365960cd0 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1104,11 +1104,11 @@ static enum dc_status apply_single_controller_ctx_to_hw(
true : false);
resource_build_info_frame(pipe_ctx);
-
+ dce110_update_info_frame(pipe_ctx);
if (!pipe_ctx_old->stream) {
core_link_enable_stream(pipe_ctx);
- dce110_update_info_frame(pipe_ctx);
+
if (dc_is_dp_signal(pipe_ctx->stream->signal))
dce110_unblank_stream(pipe_ctx,
&stream->sink->link->cur_link_settings);
@@ -1664,7 +1664,7 @@ enum dc_status dce110_apply_ctx_to_hw(
apply_min_clocks(dc, context, &clocks_state, true);
#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
- if (dc->ctx->dce_version == DCN_VERSION_1_0) {
+ if (dc->ctx->dce_version >= DCN_VERSION_1_0) {
if (context->bw.dcn.calc_clk.fclk_khz
> dc->current_context->bw.dcn.cur_clk.fclk_khz) {
struct dm_pp_clock_for_voltage_req clock;