diff options
| author | Tony Cheng | 2016-11-30 22:15:47 +0100 |
|---|---|---|
| committer | Alex Deucher | 2017-09-26 23:02:31 +0200 |
| commit | 197062bf12d7a516ea96e24859fe5981e30ea9ff (patch) | |
| tree | 0b1edff5ba889bdf375a2f41ccc6c8063621816e /drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c | |
| parent | drm/amd/display: fix REG_SET_5 macro (diff) | |
| download | kernel-qcow2-linux-197062bf12d7a516ea96e24859fe5981e30ea9ff.tar.gz kernel-qcow2-linux-197062bf12d7a516ea96e24859fe5981e30ea9ff.tar.xz kernel-qcow2-linux-197062bf12d7a516ea96e24859fe5981e30ea9ff.zip | |
drm/amd/display: refactor DCE11 DVVM
- move to new programming style
- clean up table to make it obvious what we are programming
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c index 959467fa421e..cac3dc425039 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c @@ -474,7 +474,7 @@ static const struct resource_create_funcs res_create_funcs = { }; #define mi_inst_regs(id) { \ - MI_REG_LIST(id), \ + MI_DCE11_REG_LIST(id), \ .MC_HUB_RDREQ_DMIF_LIMIT = mmMC_HUB_RDREQ_DMIF_LIMIT \ } static const struct dce_mem_input_registers mi_regs[] = { @@ -484,12 +484,12 @@ static const struct dce_mem_input_registers mi_regs[] = { }; static const struct dce_mem_input_shift mi_shifts = { - MI_DCE_MASK_SH_LIST(__SHIFT), + MI_DCE11_MASK_SH_LIST(__SHIFT), .ENABLE = MC_HUB_RDREQ_DMIF_LIMIT__ENABLE__SHIFT }; static const struct dce_mem_input_mask mi_masks = { - MI_DCE_MASK_SH_LIST(_MASK), + MI_DCE11_MASK_SH_LIST(_MASK), .ENABLE = MC_HUB_RDREQ_DMIF_LIMIT__ENABLE_MASK }; |