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| author | Hersen Wu | 2017-01-06 22:23:18 +0100 |
|---|---|---|
| committer | Alex Deucher | 2017-09-26 23:09:13 +0200 |
| commit | 4b5e7d620901778b24a2980bbc9941eff9b47f77 (patch) | |
| tree | 3c74bf153f9cef478702cbede856eb6f8788e00e /drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c | |
| parent | drm/amd/display: blank mechanism for supporting MPO (diff) | |
| download | kernel-qcow2-linux-4b5e7d620901778b24a2980bbc9941eff9b47f77.tar.gz kernel-qcow2-linux-4b5e7d620901778b24a2980bbc9941eff9b47f77.tar.xz kernel-qcow2-linux-4b5e7d620901778b24a2980bbc9941eff9b47f77.zip | |
drm/amd/display: set blank functionality
1. remove the sleep mechanism while set_blank true from
the timing generator.
Since Hw sequencer is the one that manages the flow
he will be responsible for wait for blanck in a critical places.
Signed-off-by: Leon Elazar <leon.elazar@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c | 28 |
1 files changed, 1 insertions, 27 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c index e70704d1ba87..f4b8576a0546 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c @@ -1808,7 +1808,7 @@ bool dce110_tg_is_blanked(struct timing_generator *tg) return false; } -bool dce110_tg_set_blank(struct timing_generator *tg, +void dce110_tg_set_blank(struct timing_generator *tg, bool enable_blanking) { struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); @@ -1824,8 +1824,6 @@ bool dce110_tg_set_blank(struct timing_generator *tg, value = 0; if (enable_blanking) { - int counter; - set_reg_field_value( value, 1, @@ -1834,32 +1832,8 @@ bool dce110_tg_set_blank(struct timing_generator *tg, dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_BLANK_CONTROL), value); - for (counter = 0; counter < 100; counter++) { - value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_BLANK_CONTROL)); - - if (get_reg_field_value( - value, - CRTC_BLANK_CONTROL, - CRTC_BLANK_DATA_EN) == 1 && - get_reg_field_value( - value, - CRTC_BLANK_CONTROL, - CRTC_CURRENT_BLANK_STATE) == 1) - break; - - msleep(1); - } - - if (counter == 100) { - dm_logger_write(tg->ctx->logger, LOG_ERROR, - "timing generator %d blank timing out.\n", - tg110->controller_id); - return false; - } } else dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_BLANK_CONTROL), 0); - - return true; } bool dce110_tg_validate_timing(struct timing_generator *tg, |