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| author | Dave Airlie | 2019-07-11 22:57:16 +0200 |
|---|---|---|
| committer | Dave Airlie | 2019-07-11 22:57:16 +0200 |
| commit | b784d6bff97154af829e46271dbb16967106a493 (patch) | |
| tree | 8bd78458e36a2d6dbd033e37a19fcc5e3a6b70bf /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | |
| parent | Merge tag 'drm-next-5.3-2019-06-27' of git://people.freedesktop.org/~agd5f/li... (diff) | |
| parent | drm/amdgpu/navi10: add uclk activity sensor (diff) | |
| download | kernel-qcow2-linux-b784d6bff97154af829e46271dbb16967106a493.tar.gz kernel-qcow2-linux-b784d6bff97154af829e46271dbb16967106a493.tar.xz kernel-qcow2-linux-b784d6bff97154af829e46271dbb16967106a493.zip | |
Merge tag 'drm-next-5.3-2019-07-09' of git://people.freedesktop.org/~agd5f/linux into drm-next
drm-next-5.3-2019-07-09:
amdgpu:
- GPU reset for navi10
- Powerplay fixes for navi10
- GFX fixes for navi10
- Prepare for hmm_range_register API change
- XGMI fixes
- clang warning fixes
- Fixes for various kconfig scenarios
- Misc fixes and cleanups
amdkfd:
- Add workaround for soft hangs with oversubscribed runlists
- Remove duplicated pcie atomics request
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190710035017.3407-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c index fb8aff7360ec..4e52df82c993 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c @@ -2647,7 +2647,7 @@ static void update_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_ calculated_states[i].dram_speed_mts = uclk_states[i] * 16 / 1000; // FCLK:UCLK ratio is 1.08 - min_fclk_required_by_uclk = ((unsigned long long)uclk_states[i]) * 1080 / 1000000; + min_fclk_required_by_uclk = mul_u64_u32_shr(BIT_ULL(32) * 1080 / 1000000, uclk_states[i], 32); calculated_states[i].fabricclk_mhz = (min_fclk_required_by_uclk < min_dcfclk) ? min_dcfclk : min_fclk_required_by_uclk; |