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author | Leo Li | 2019-03-15 18:50:26 +0100 |
---|---|---|
committer | Alex Deucher | 2019-06-22 16:34:08 +0200 |
commit | 1b394e92a149db7ec277b7cc995888304149a5b1 (patch) | |
tree | 5cfcad908fbd8d3ef886233e973d255d08a31847 /drivers/gpu/drm/amd/display/dc/dcn20 | |
parent | drm/amd/display: enable DSC support by default (diff) | |
download | kernel-qcow2-linux-1b394e92a149db7ec277b7cc995888304149a5b1.tar.gz kernel-qcow2-linux-1b394e92a149db7ec277b7cc995888304149a5b1.tar.xz kernel-qcow2-linux-1b394e92a149db7ec277b7cc995888304149a5b1.zip |
drm/amd/display: Disconnect DCN2 mpcc when changing tg
A previous fix was done for DCN1 that needed to be ported to DCN2:
commit 60c677534e73 ("drm/amd/display: Disconnect mpcc when changing tg")
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index f6e25f75a0a9..f2e5e4928119 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -1323,9 +1323,10 @@ static void dcn20_apply_ctx_for_surface( } } - if (!pipe_ctx->plane_state && - old_pipe_ctx->plane_state && - old_pipe_ctx->stream_res.tg == tg) { + if ((!pipe_ctx->plane_state || + pipe_ctx->stream_res.tg != old_pipe_ctx->stream_res.tg) && + old_pipe_ctx->plane_state && + old_pipe_ctx->stream_res.tg == tg) { dc->hwss.plane_atomic_disconnect(dc, old_pipe_ctx); removed_pipe[i] = true; |