diff options
| author | Joshua Aberback | 2019-03-26 20:04:31 +0100 |
|---|---|---|
| committer | Alex Deucher | 2019-06-22 16:34:09 +0200 |
| commit | 2e2e73fc632d34b0cec612dc5df0ba64cc98df9a (patch) | |
| tree | 9905ac79b94f82655741515f582b54c40c71f174 /drivers/gpu/drm/amd/display/dc/dcn20 | |
| parent | drm/amd/display: fix dsc validation (diff) | |
| download | kernel-qcow2-linux-2e2e73fc632d34b0cec612dc5df0ba64cc98df9a.tar.gz kernel-qcow2-linux-2e2e73fc632d34b0cec612dc5df0ba64cc98df9a.tar.xz kernel-qcow2-linux-2e2e73fc632d34b0cec612dc5df0ba64cc98df9a.zip | |
drm/amd/display: Remove dependency on pipe->plane for immedaite flip status
[Why]
dcn20_apply_ctx_for_surface can be called with 0 planes, which means we
should blank the display. In this case when we get down to
dcn20_setup_gsl_group_as_lock, pipe_ctx->plane_state is NULL, but we don't
check for it. However, this function is only called by
dcn20_pipe_control_lock, and in that function we alraedy have a local for
the immediate flip status, which is what we care about in the plane state.
[How]
- pass in immediate flip status as parameter
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h | 3 |
2 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index ccb9f277911a..0cad51ece06e 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -1255,7 +1255,7 @@ static void dcn20_pipe_control_lock( if (lock && pipe->bottom_pipe != NULL) if ((flip_immediate && pipe->stream_res.gsl_group == 0) || (!flip_immediate && pipe->stream_res.gsl_group > 0)) - dcn20_setup_gsl_group_as_lock(dc, pipe); + dcn20_setup_gsl_group_as_lock(dc, pipe, flip_immediate); if (pipe->plane_state != NULL && pipe->plane_state->triplebuffer_flips) { if (lock) @@ -1890,14 +1890,15 @@ static int find_free_gsl_group(const struct dc *dc) */ void dcn20_setup_gsl_group_as_lock( const struct dc *dc, - struct pipe_ctx *pipe_ctx) + struct pipe_ctx *pipe_ctx, + bool flip_immediate) { struct gsl_params gsl; int group_idx; memset(&gsl, 0, sizeof(struct gsl_params)); - if (pipe_ctx->plane_state->flip_immediate) { + if (flip_immediate) { /* return if group already assigned since GSL was set up * for vsync flip, we would unassign so it can't be "left over" */ @@ -1964,7 +1965,7 @@ void dcn20_setup_gsl_group_as_lock( pipe_ctx->stream_res.tg->funcs->set_gsl_source_select( pipe_ctx->stream_res.tg, group_idx, - pipe_ctx->plane_state->flip_immediate ? 4 : 0); + flip_immediate ? 4 : 0); } else BREAK_TO_DEBUGGER(); } diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h index aba6f87c7f2b..37699df685ee 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h @@ -85,6 +85,7 @@ void dcn20_program_tripleBuffer( void dcn20_setup_vupdate_interrupt(struct pipe_ctx *pipe_ctx); void dcn20_setup_gsl_group_as_lock(const struct dc *dc, - struct pipe_ctx *pipe_ctx); + struct pipe_ctx *pipe_ctx, + bool flip_immediate); #endif /* __DC_HWSS_DCN20_H__ */ |