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| author | Tony Cheng | 2019-03-22 19:22:07 +0100 |
|---|---|---|
| committer | Alex Deucher | 2019-06-22 16:34:09 +0200 |
| commit | b7d39c5878776cd936cf3d72f60e89dbd39dc56c (patch) | |
| tree | 1803a2154336e5e4bd6f2149dc32abb037e391ab /drivers/gpu/drm/amd/display/dc/dcn20 | |
| parent | drm/amd/display: fix fpga fclk programming (diff) | |
| download | kernel-qcow2-linux-b7d39c5878776cd936cf3d72f60e89dbd39dc56c.tar.gz kernel-qcow2-linux-b7d39c5878776cd936cf3d72f60e89dbd39dc56c.tar.xz kernel-qcow2-linux-b7d39c5878776cd936cf3d72f60e89dbd39dc56c.zip | |
drm/amd/display: move dsc clock from plane_resource to stream_resource
code restructure.
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c index 33f1a1d972a9..aa04df64522f 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c @@ -2204,7 +2204,7 @@ bool dcn20_validate_bandwidth(struct dc *dc, context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT - context->res_ctx.pipe_ctx[i].plane_res.bw.dscclk_khz = + context->res_ctx.pipe_ctx[i].stream_res.dscclk_khz = context->bw_ctx.dml.vba.DSCCLK_calculated[pipe_idx] * 1000; #endif context->res_ctx.pipe_ctx[i].pipe_dlg_param = pipes[pipe_idx].pipe.dest; |