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authorNikola Cornij2019-04-03 18:17:34 +0200
committerAlex Deucher2019-06-22 16:34:10 +0200
commitc92b4c46c164fbc05b72543b76222b8468f9fad3 (patch)
treecf25baff9679a5ca67d180dbd559404592ba60b8 /drivers/gpu/drm/amd/display/dc/dcn20
parentdrm/amd/display: Change Min fclk to 1.2Ghz (diff)
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drm/amd/display: Mark DSC resource as unused after copying to the secondary ODM pipe
[why] DSC resource has to be acquired before it can be used and simply copying a reference to it is very likely to cause problems when accessing DSC. [how] Set DSC resource pointer to NULL to mark it as unused after primary pipe resources were copied to the secondary ODM pipe. Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index c9b7340c9601..b23333b74f5d 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -1427,6 +1427,9 @@ static bool dcn20_split_stream_for_combine(
secondary_pipe->plane_res.xfm = pool->transforms[secondary_pipe->pipe_idx];
secondary_pipe->plane_res.dpp = pool->dpps[secondary_pipe->pipe_idx];
secondary_pipe->plane_res.mpcc_inst = pool->dpps[secondary_pipe->pipe_idx]->inst;
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+ secondary_pipe->stream_res.dsc = NULL;
+#endif
if (primary_pipe->bottom_pipe && primary_pipe->bottom_pipe != secondary_pipe) {
ASSERT(!secondary_pipe->bottom_pipe);
secondary_pipe->bottom_pipe = primary_pipe->bottom_pipe;