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| author | Rex Zhu | 2018-06-20 06:52:43 +0200 |
|---|---|---|
| committer | Alex Deucher | 2018-07-05 23:38:51 +0200 |
| commit | b1c6fddb583f70892f2dd6de8c63af3aa4600a7b (patch) | |
| tree | f6e3f1af87091e5e87c83134927847438b02d2e4 /drivers/gpu/drm/amd/display/dc/dm_services_types.h | |
| parent | drm/amd/display: Ctrl stutter mode through module parameter (diff) | |
| download | kernel-qcow2-linux-b1c6fddb583f70892f2dd6de8c63af3aa4600a7b.tar.gz kernel-qcow2-linux-b1c6fddb583f70892f2dd6de8c63af3aa4600a7b.tar.xz kernel-qcow2-linux-b1c6fddb583f70892f2dd6de8c63af3aa4600a7b.zip | |
drm/amd/display: Fix a typo in wm_min_memg_clk_in_khz
change wm_min_memg_clk_in_khz -> wm_min_mem_clk_in_khz
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dm_services_types.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dm_services_types.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dm_services_types.h b/drivers/gpu/drm/amd/display/dc/dm_services_types.h index ab8c77d4e6df..2b83f922ac02 100644 --- a/drivers/gpu/drm/amd/display/dc/dm_services_types.h +++ b/drivers/gpu/drm/amd/display/dc/dm_services_types.h @@ -137,7 +137,7 @@ struct dm_pp_clock_range_for_wm_set { enum dm_pp_wm_set_id wm_set_id; uint32_t wm_min_eng_clk_in_khz; uint32_t wm_max_eng_clk_in_khz; - uint32_t wm_min_memg_clk_in_khz; + uint32_t wm_min_mem_clk_in_khz; uint32_t wm_max_mem_clk_in_khz; }; @@ -150,7 +150,7 @@ struct dm_pp_clock_range_for_dmif_wm_set_soc15 { enum dm_pp_wm_set_id wm_set_id; uint32_t wm_min_dcfclk_clk_in_khz; uint32_t wm_max_dcfclk_clk_in_khz; - uint32_t wm_min_memg_clk_in_khz; + uint32_t wm_min_mem_clk_in_khz; uint32_t wm_max_mem_clk_in_khz; }; @@ -158,7 +158,7 @@ struct dm_pp_clock_range_for_mcif_wm_set_soc15 { enum dm_pp_wm_set_id wm_set_id; uint32_t wm_min_socclk_clk_in_khz; uint32_t wm_max_socclk_clk_in_khz; - uint32_t wm_min_memg_clk_in_khz; + uint32_t wm_min_mem_clk_in_khz; uint32_t wm_max_mem_clk_in_khz; }; |