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| author | Tony Cheng | 2016-12-29 16:56:32 +0100 |
|---|---|---|
| committer | Alex Deucher | 2017-09-26 23:08:15 +0200 |
| commit | 4dfb0badee55bf163f4ce3307572cd4963c791d0 (patch) | |
| tree | 2afa13d6c478c8d66a7a8a894239998c0f681f81 /drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h | |
| parent | drm/amd/display: Fix link retraining hw sequence for auto test (diff) | |
| download | kernel-qcow2-linux-4dfb0badee55bf163f4ce3307572cd4963c791d0.tar.gz kernel-qcow2-linux-4dfb0badee55bf163f4ce3307572cd4963c791d0.tar.xz kernel-qcow2-linux-4dfb0badee55bf163f4ce3307572cd4963c791d0.zip | |
drm/amd/display: simplify link_encoder
- remove unnecessary feature flags
- remove wireless and VGA validation
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h | 20 |
1 files changed, 1 insertions, 19 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h index 77f8aa410898..49c4b6587456 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h @@ -33,34 +33,16 @@ struct encoder_init_data { struct encoder_feature_support { union { struct { - /* 1 - external encoder; 0 - internal encoder */ - uint32_t EXTERNAL_ENCODER:1; - uint32_t ANALOG_ENCODER:1; - uint32_t STEREO_SYNC:1; - /* check the DDC data pin - * when performing DP Sink detection */ - uint32_t DP_SINK_DETECT_POLL_DATA_PIN:1; - /* CPLIB authentication - * for external DP chip supported */ - uint32_t CPLIB_DP_AUTHENTICATION:1; uint32_t IS_HBR2_CAPABLE:1; uint32_t IS_HBR3_CAPABLE:1; - uint32_t IS_HBR2_VALIDATED:1; uint32_t IS_TPS3_CAPABLE:1; uint32_t IS_TPS4_CAPABLE:1; - uint32_t IS_AUDIO_CAPABLE:1; - uint32_t IS_VCE_SUPPORTED:1; - uint32_t IS_CONVERTER:1; - uint32_t IS_Y_ONLY_CAPABLE:1; uint32_t IS_YCBCR_CAPABLE:1; } bits; uint32_t raw; } flags; - /* maximum supported deep color depth */ - enum dc_color_depth max_deep_color; + enum dc_color_depth max_hdmi_deep_color; - /* maximum supported clock */ - unsigned int max_pixel_clock; unsigned int max_hdmi_pixel_clock; bool ycbcr420_supported; }; |