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| author | Dave Airlie | 2018-05-25 02:28:14 +0200 |
|---|---|---|
| committer | Dave Airlie | 2018-05-25 02:28:33 +0200 |
| commit | dd41fb8547c2422f3a3a75e7226525e8bba9381c (patch) | |
| tree | 0e94d33f1fc940999d7b05d5e383fb6e13625ac8 /drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h | |
| parent | Merge tag 'drm/tegra/for-4.18-rc1' of git://anongit.freedesktop.org/tegra/lin... (diff) | |
| parent | drm/amd/display: Remove use of division operator for long longs (diff) | |
| download | kernel-qcow2-linux-dd41fb8547c2422f3a3a75e7226525e8bba9381c.tar.gz kernel-qcow2-linux-dd41fb8547c2422f3a3a75e7226525e8bba9381c.tar.xz kernel-qcow2-linux-dd41fb8547c2422f3a3a75e7226525e8bba9381c.zip | |
Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux into drm-next
Last feature request for 4.18. Mostly vega20 support.
- Vega20 support
- clock and powergating for VCN
- misc bug fixes
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180524152427.32713-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h')
| -rw-r--r-- | drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h index f730d0629020..b6f74bf4af02 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h @@ -2095,6 +2095,18 @@ #define mmDC_GPIO_AUX_CTRL_2_BASE_IDX 2 #define mmDC_GPIO_RXEN 0x212f #define mmDC_GPIO_RXEN_BASE_IDX 2 +#define mmDC_GPIO_AUX_CTRL_3 0x2130 +#define mmDC_GPIO_AUX_CTRL_3_BASE_IDX 2 +#define mmDC_GPIO_AUX_CTRL_4 0x2131 +#define mmDC_GPIO_AUX_CTRL_4_BASE_IDX 2 +#define mmDC_GPIO_AUX_CTRL_5 0x2132 +#define mmDC_GPIO_AUX_CTRL_5_BASE_IDX 2 +#define mmAUXI2C_PAD_ALL_PWR_OK 0x2133 +#define mmAUXI2C_PAD_ALL_PWR_OK_BASE_IDX 2 +#define mmDC_GPIO_PULLUPEN 0x2134 +#define mmDC_GPIO_PULLUPEN_BASE_IDX 2 +#define mmDC_GPIO_AUX_CTRL_6 0x2135 +#define mmDC_GPIO_AUX_CTRL_6_BASE_IDX 2 #define mmBPHYC_DAC_MACRO_CNTL 0x2136 #define mmBPHYC_DAC_MACRO_CNTL_BASE_IDX 2 #define mmDAC_MACRO_CNTL_RESERVED0 0x2136 |