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author | Rex Zhu | 2018-01-04 09:42:06 +0100 |
---|---|---|
committer | Alex Deucher | 2018-02-19 20:17:55 +0100 |
commit | 11f64ff5f323d697d0e3be932aaaaa5b38b144cd (patch) | |
tree | d60a52b7c3b1cd1c9e4cfcddb361eb9199983e17 /drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | |
parent | drm/amd/pp: Move DPMTABLE_* definitions to common header file (diff) | |
download | kernel-qcow2-linux-11f64ff5f323d697d0e3be932aaaaa5b38b144cd.tar.gz kernel-qcow2-linux-11f64ff5f323d697d0e3be932aaaaa5b38b144cd.tar.xz kernel-qcow2-linux-11f64ff5f323d697d0e3be932aaaaa5b38b144cd.zip |
drm/amd/pp: Add a new pp feature mask bit for OD feature
when this bit was set on module load,
driver will allow the user over/under gpu
clock and voltage through sysfs.
by default, this bit was not set.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c index 11a900bb7f8c..9f62cb1bc58f 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c @@ -3572,8 +3572,7 @@ static int smu7_populate_and_upload_sclk_mclk_dpm_levels( dpm_table->sclk_table.dpm_levels [dpm_table->sclk_table.count - 1].value = sclk; - if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_OD6PlusinACSupport) || - phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_OD6PlusinDCSupport)) { + if (hwmgr->od_enabled) { /* Need to do calculation based on the golden DPM table * as the Heatmap GPU Clock axis is also based on the default values */ @@ -3618,8 +3617,7 @@ static int smu7_populate_and_upload_sclk_mclk_dpm_levels( dpm_table->mclk_table.dpm_levels [dpm_table->mclk_table.count - 1].value = mclk; - if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_OD6PlusinACSupport) || - phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_OD6PlusinDCSupport)) { + if (hwmgr->od_enabled) { PP_ASSERT_WITH_CODE( (golden_dpm_table->mclk_table.dpm_levels |