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| author | Chengming Gui | 2019-01-17 10:35:58 +0100 |
|---|---|---|
| committer | Alex Deucher | 2019-03-19 21:03:59 +0100 |
| commit | b3c139d537c018d545cfaad38b9f14fd0576147a (patch) | |
| tree | 0f8d7435b17fe780aee5219f7c4516ebc4470750 /drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | |
| parent | drm/amd/powerplay: add display_config to handle display config for SMU11. (diff) | |
| download | kernel-qcow2-linux-b3c139d537c018d545cfaad38b9f14fd0576147a.tar.gz kernel-qcow2-linux-b3c139d537c018d545cfaad38b9f14fd0576147a.tar.xz kernel-qcow2-linux-b3c139d537c018d545cfaad38b9f14fd0576147a.zip | |
drm/amd/powerplay: add mclk_latency_table struct and smu_clocks struct for SMU11
add mclk_latency_table struct and smu_clocks structi
to support sys interface for SMU11.
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h index 5ea8bee1de70..9d9e527bac3c 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h @@ -318,6 +318,7 @@ struct smu_dpm_context { void *golden_dpm_context; struct smu_power_state *dpm_request_power_state; struct smu_power_state *dpm_current_power_state; + struct mclock_latency_table *mclk_latency_table; }; struct smu_power_context { @@ -335,6 +336,25 @@ struct smu_feature DECLARE_BITMAP(enabled, SMU_FEATURE_MAX); }; +struct smu_clocks { + uint32_t engine_clock; + uint32_t memory_clock; + uint32_t bus_bandwidth; + uint32_t engine_clock_in_sr; + uint32_t dcef_clock; + uint32_t dcef_clock_in_sr; +}; + +#define MAX_REGULAR_DPM_NUM 16 +struct mclk_latency_entries { + uint32_t frequency; + uint32_t latency; +}; +struct mclock_latency_table { + uint32_t count; + struct mclk_latency_entries entries[MAX_REGULAR_DPM_NUM]; +}; + #define WORKLOAD_POLICY_MAX 7 struct smu_context { |