diff options
| author | Eric Huang | 2017-03-06 19:13:48 +0100 |
|---|---|---|
| committer | Alex Deucher | 2017-03-30 05:54:54 +0200 |
| commit | d018772748fc474b2265ce333a704620b17df3fd (patch) | |
| tree | a773b67de0728b99b8f2ffc3f7c1ed090e788295 /drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | |
| parent | drm/amd: add structures for display/powerplay interface (diff) | |
| download | kernel-qcow2-linux-d018772748fc474b2265ce333a704620b17df3fd.tar.gz kernel-qcow2-linux-d018772748fc474b2265ce333a704620b17df3fd.tar.xz kernel-qcow2-linux-d018772748fc474b2265ce333a704620b17df3fd.zip | |
drm/amd/powerplay: add some display/powerplay interfaces
New interfaces needed to handle the new clock trees and
bandwidth requirements on vega10.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/inc/hwmgr.h')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h index 02185d49ff8d..7de9beabb35d 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h @@ -347,6 +347,16 @@ struct pp_hwmgr_func { int (*get_current_shallow_sleep_clocks)(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info); int (*get_clock_by_type)(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks); + int (*get_clock_by_type_with_latency)(struct pp_hwmgr *hwmgr, + enum amd_pp_clock_type type, + struct pp_clock_levels_with_latency *clocks); + int (*get_clock_by_type_with_voltage)(struct pp_hwmgr *hwmgr, + enum amd_pp_clock_type type, + struct pp_clock_levels_with_voltage *clocks); + int (*set_watermarks_for_clocks_ranges)(struct pp_hwmgr *hwmgr, + struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges); + int (*display_clock_voltage_request)(struct pp_hwmgr *hwmgr, + struct pp_display_clock_request *clock); int (*get_max_high_clocks)(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks); int (*power_off_asic)(struct pp_hwmgr *hwmgr); int (*force_clock_level)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask); |