diff options
author | Huang Rui | 2019-02-12 08:39:44 +0100 |
---|---|---|
committer | Alex Deucher | 2019-03-19 21:04:02 +0100 |
commit | 2dd1209e5760686efbf17fc6564fa58e8bb59ad1 (patch) | |
tree | b771eebb7c3f12b1128210d9d7589d21248f79d2 /drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h | |
parent | drm/amd/powerplay: fix smc messsage index report (diff) | |
download | kernel-qcow2-linux-2dd1209e5760686efbf17fc6564fa58e8bb59ad1.tar.gz kernel-qcow2-linux-2dd1209e5760686efbf17fc6564fa58e8bb59ad1.tar.xz kernel-qcow2-linux-2dd1209e5760686efbf17fc6564fa58e8bb59ad1.zip |
drm/amd/powerplay: fix byte alignment issue of smu11 pptable
The smu_11_0_powerplay_table, smu_11_0_power_saving_clock_table, and
smu_11_0_overdrive_table need byte alignment. So we must add packed attribute
in the definitions.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h index e8a654bfc6f7..92c65b80bde2 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h @@ -91,7 +91,7 @@ struct smu_11_0_overdrive_table uint8_t cap[SMU_11_0_MAX_ODFEATURE]; //OD feature support flags uint32_t max[SMU_11_0_MAX_ODSETTING]; //default maximum settings uint32_t min[SMU_11_0_MAX_ODSETTING]; //default minimum settings -}; +} __attribute__((packed)); enum SMU_11_0_PPCLOCK_ID { SMU_11_0_PPCLOCK_GFXCLK = 0, @@ -115,7 +115,7 @@ struct smu_11_0_power_saving_clock_table uint32_t count; //power_saving_clock_count = SMU_11_0_PPCLOCK_COUNT uint32_t max[SMU_11_0_MAX_PPCLOCK]; //PowerSavingClock Mode Clock Maximum array In MHz uint32_t min[SMU_11_0_MAX_PPCLOCK]; //PowerSavingClock Mode Clock Minimum array In MHz -}; +} __attribute__((packed)); struct smu_11_0_powerplay_table { @@ -142,6 +142,6 @@ struct smu_11_0_powerplay_table struct smu_11_0_overdrive_table overdrive_table; PPTable_t smc_pptable; //PPTable_t in smu11_driver_if.h -}; +} __attribute__((packed)); #endif |