diff options
author | Kenneth Feng | 2019-02-02 04:43:12 +0100 |
---|---|---|
committer | Alex Deucher | 2019-06-22 01:59:24 +0200 |
commit | 827440a90146c62351e8bbe17b295815ecd36d62 (patch) | |
tree | 8ca2d65f274e4bb38eaddd09a2ed90db97f049c4 /drivers/gpu/drm/amd/powerplay/smu_v11_0.c | |
parent | drm/amd/powerplay: move bootup value before read pptable from vbios (diff) | |
download | kernel-qcow2-linux-827440a90146c62351e8bbe17b295815ecd36d62.tar.gz kernel-qcow2-linux-827440a90146c62351e8bbe17b295815ecd36d62.tar.xz kernel-qcow2-linux-827440a90146c62351e8bbe17b295815ecd36d62.zip |
drm/amd/powerplay: enable backdoor smu fw loading (v2)
enable backdoor smu fw loading on navi10
v2: squash in define fix (Alex)
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/smu_v11_0.c')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c index 4dcbf6ee7e8e..2d55b825497f 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c @@ -207,6 +207,39 @@ out: static int smu_v11_0_load_microcode(struct smu_context *smu) { + struct amdgpu_device *adev = smu->adev; + const uint32_t *src; + const struct smc_firmware_header_v1_0 *hdr; + uint32_t addr_start = MP1_SRAM; + uint32_t i; + uint32_t mp1_fw_flags; + + hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data; + src = (const uint32_t *)(adev->pm.fw->data + + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); + + for (i = 1; i < MP1_SMC_SIZE/4 - 1; i++) { + WREG32_PCIE(addr_start, src[i]); + addr_start += 4; + } + + WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), + 1 & MP1_SMN_PUB_CTRL__RESET_MASK); + WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), + 1 & ~MP1_SMN_PUB_CTRL__RESET_MASK); + + for (i = 0; i < adev->usec_timeout; i++) { + mp1_fw_flags = RREG32_PCIE(MP1_Public | + (smnMP1_FIRMWARE_FLAGS & 0xffffffff)); + if ((mp1_fw_flags & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) >> + MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT) + break; + udelay(1); + } + + if (i == adev->usec_timeout) + return -ETIME; + return 0; } |