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authorHuang Rui2019-01-11 08:51:16 +0100
committerAlex Deucher2019-03-19 21:03:58 +0100
commite73cf10811729411d67c89f22884a1de41a94b08 (patch)
tree69108633a1fa5cb8edc5f06574c058993ef46860 /drivers/gpu/drm/amd/powerplay/smu_v11_0.c
parentdrm/amd/powerplay: implement sysfs of pp_force_state for sw-smu (diff)
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drm/amd/powerplay: add the function to set deep sleep dcefclk
This patch adds the function to set deep sleep dcefclk. It will be used on display part. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kevin Wang <Kevin1.Wang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/smu_v11_0.c')
-rw-r--r--drivers/gpu/drm/amd/powerplay/smu_v11_0.c21
1 files changed, 14 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 1f9459c4ff51..5987c89d4155 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -601,21 +601,27 @@ static int smu_v11_0_write_pptable(struct smu_context *smu)
return ret;
}
+static int smu_v11_0_set_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk)
+{
+ int ret;
+
+ ret = smu_send_smc_msg_with_param(smu,
+ SMU_MSG_SetMinDeepSleepDcefclk, clk);
+ if (ret)
+ pr_err("SMU11 attempt to set divider for DCEFCLK Failed!");
+
+ return ret;
+}
+
static int smu_v11_0_set_min_dcef_deep_sleep(struct smu_context *smu)
{
- int ret = 0;
struct smu_table_context *table_context = &smu->smu_table;
if (!table_context)
return -EINVAL;
- ret = smu_send_smc_msg_with_param(smu,
- SMU_MSG_SetMinDeepSleepDcefclk,
+ return smu_set_deep_sleep_dcefclk(smu,
table_context->boot_values.dcefclk / 100);
- if (ret)
- pr_err("SMU11 attempt to set divider for DCEFCLK Failed!");
-
- return ret;
}
static int smu_v11_0_set_tool_table_location(struct smu_context *smu)
@@ -1151,6 +1157,7 @@ static const struct smu_funcs smu_v11_0_funcs = {
.init_max_sustainable_clocks = smu_v11_0_init_max_sustainable_clocks,
.start_thermal_control = smu_v11_0_start_thermal_control,
.read_sensor = smu_v11_0_read_sensor,
+ .set_deep_sleep_dcefclk = smu_v11_0_set_deep_sleep_dcefclk,
};
void smu_v11_0_set_smu_funcs(struct smu_context *smu)