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| author | Rex Zhu | 2017-04-19 10:00:21 +0200 |
|---|---|---|
| committer | Alex Deucher | 2017-04-28 23:32:51 +0200 |
| commit | afc0255c9a5ecede2f235f4d117c2913059aa3c3 (patch) | |
| tree | 28a920f03864e676ad5d7e3d06060b3188f6194d /drivers/gpu/drm/amd/powerplay | |
| parent | drm/amd/powerplay: enable pcie dpm on Vega10. (diff) | |
| download | kernel-qcow2-linux-afc0255c9a5ecede2f235f4d117c2913059aa3c3.tar.gz kernel-qcow2-linux-afc0255c9a5ecede2f235f4d117c2913059aa3c3.tar.xz kernel-qcow2-linux-afc0255c9a5ecede2f235f4d117c2913059aa3c3.zip | |
drm/amd/powerplay: enable clock stretch feature on Vega10.
Correctly calculate CKSVidOffset
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c index ee40378c3e82..0042c339415f 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c @@ -123,6 +123,9 @@ static void vega10_set_default_registry_data(struct pp_hwmgr *hwmgr) data->registry_data.enable_tdc_limit_feature = 1; } + data->registry_data.clock_stretcher_support = + hwmgr->feature_mask & PP_CLOCK_STRETCH_MASK ? true : false; + data->registry_data.disable_water_mark = 0; data->registry_data.fan_control_support = 1; @@ -2045,10 +2048,10 @@ static int vega10_populate_clock_stretcher_table(struct pp_hwmgr *hwmgr) table_info->vdd_dep_on_sclk; uint32_t i; - for (i = 0; dep_table->count; i++) { + for (i = 0; i < dep_table->count; i++) { pp_table->CksEnable[i] = dep_table->entries[i].cks_enable; - pp_table->CksVidOffset[i] = convert_to_vid( - dep_table->entries[i].cks_voffset); + pp_table->CksVidOffset[i] = (uint8_t)(dep_table->entries[i].cks_voffset + * VOLTAGE_VID_OFFSET_SCALE2 / VOLTAGE_VID_OFFSET_SCALE1); } return 0; @@ -2380,8 +2383,7 @@ static int vega10_init_smc_table(struct pp_hwmgr *hwmgr) "Failed to initialize UVD Level!", return result); - if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, - PHM_PlatformCaps_ClockStretcher)) { + if (data->registry_data.clock_stretcher_support) { result = vega10_populate_clock_stretcher_table(hwmgr); PP_ASSERT_WITH_CODE(!result, "Failed to populate Clock Stretcher Table!", |