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author | Sean Paul | 2013-06-11 08:54:02 +0200 |
---|---|---|
committer | Inki Dae | 2013-06-28 14:13:56 +0200 |
commit | 0bfb1f8bcbf298854276472e20ee66312aee5029 (patch) | |
tree | ff5599b1cebb4186c67cfcbcddf497196d48c072 /drivers/gpu/drm/exynos/exynos_hdmi.c | |
parent | drm/exynos: Clean up logs for DRM_ERROR / DRM_DEBUG_KMS (diff) | |
download | kernel-qcow2-linux-0bfb1f8bcbf298854276472e20ee66312aee5029.tar.gz kernel-qcow2-linux-0bfb1f8bcbf298854276472e20ee66312aee5029.tar.xz kernel-qcow2-linux-0bfb1f8bcbf298854276472e20ee66312aee5029.zip |
drm/exynos: Prepare/Unprepare HDMI subsystem clocks
Change the clk_enable/clk_disable calls in mixer and hdmi drivers into
clk_prepare_enable/clk_disable_unprepare, respectively.
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_hdmi.c')
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_hdmi.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 65bb9841317b..83bd496ca6a3 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -1111,9 +1111,9 @@ static void hdmi_v13_mode_apply(struct hdmi_context *hdata) hdmi_regs_dump(hdata, "timing apply"); } - clk_disable(hdata->res.sclk_hdmi); + clk_disable_unprepare(hdata->res.sclk_hdmi); clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_hdmiphy); - clk_enable(hdata->res.sclk_hdmi); + clk_prepare_enable(hdata->res.sclk_hdmi); /* enable HDMI and timing generator */ hdmi_reg_writemask(hdata, HDMI_CON_0, ~0, HDMI_EN); @@ -1278,9 +1278,9 @@ static void hdmi_v14_mode_apply(struct hdmi_context *hdata) hdmi_regs_dump(hdata, "timing apply"); } - clk_disable(hdata->res.sclk_hdmi); + clk_disable_unprepare(hdata->res.sclk_hdmi); clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_hdmiphy); - clk_enable(hdata->res.sclk_hdmi); + clk_prepare_enable(hdata->res.sclk_hdmi); /* enable HDMI and timing generator */ hdmi_reg_writemask(hdata, HDMI_CON_0, ~0, HDMI_EN); @@ -1304,9 +1304,9 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata) u8 buffer[2]; u32 reg; - clk_disable(hdata->res.sclk_hdmi); + clk_disable_unprepare(hdata->res.sclk_hdmi); clk_set_parent(hdata->res.sclk_hdmi, hdata->res.sclk_pixel); - clk_enable(hdata->res.sclk_hdmi); + clk_prepare_enable(hdata->res.sclk_hdmi); /* operation mode */ buffer[0] = 0x1f; @@ -1683,9 +1683,9 @@ static void hdmi_poweron(struct hdmi_context *hdata) if (regulator_bulk_enable(res->regul_count, res->regul_bulk)) DRM_DEBUG_KMS("failed to enable regulator bulk\n"); - clk_enable(res->hdmiphy); - clk_enable(res->hdmi); - clk_enable(res->sclk_hdmi); + clk_prepare_enable(res->hdmiphy); + clk_prepare_enable(res->hdmi); + clk_prepare_enable(res->sclk_hdmi); hdmiphy_poweron(hdata); } @@ -1706,9 +1706,9 @@ static void hdmi_poweroff(struct hdmi_context *hdata) hdmiphy_conf_reset(hdata); hdmiphy_poweroff(hdata); - clk_disable(res->sclk_hdmi); - clk_disable(res->hdmi); - clk_disable(res->hdmiphy); + clk_disable_unprepare(res->sclk_hdmi); + clk_disable_unprepare(res->hdmi); + clk_disable_unprepare(res->hdmiphy); regulator_bulk_disable(res->regul_count, res->regul_bulk); mutex_lock(&hdata->hdmi_mutex); |