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authorAndrzej Hajda2015-09-25 14:48:23 +0200
committerInki Dae2015-10-26 07:09:52 +0100
commitda5e36ae963b24318e0d6b9f226abb795999106a (patch)
tree23784e11bc2718fa78241563910e98681f88332e /drivers/gpu/drm/exynos/exynos_hdmi.c
parentdrm/exynos/hdmi: use constant size array for regulators (diff)
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drm/exynos/hdmi: simplify clock re-parenting
Driver tries to disable sclk_hdmi during re-parenting, to avoid possible glitches. It is ineffective as the clock is used also by other devices (mixer). Anyway driver works without disabling sclk_hdmi. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_hdmi.c')
-rw-r--r--drivers/gpu/drm/exynos/exynos_hdmi.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 583dd5ee0cb3..475341f3f9e0 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -1569,9 +1569,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
hdmiphy_wait_for_pll(hdata);
- clk_disable_unprepare(hdata->res.sclk_hdmi);
clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_hdmiphy);
- clk_prepare_enable(hdata->res.sclk_hdmi);
/* enable HDMI and timing generator */
hdmi_start(hdata, true);
@@ -1579,9 +1577,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
static void hdmiphy_conf_reset(struct hdmi_context *hdata)
{
- clk_disable_unprepare(hdata->res.sclk_hdmi);
clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_pixel);
- clk_prepare_enable(hdata->res.sclk_hdmi);
/* reset hdmiphy */
hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT);