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| author | Zhenyu Wang | 2018-07-31 05:02:13 +0200 |
|---|---|---|
| committer | Zhenyu Wang | 2018-08-07 04:40:11 +0200 |
| commit | 69ca5af4ff9a3ff96e4595c2b7522c01a2641779 (patch) | |
| tree | f8648abf75c22daf73ef9e039eeedc4778f6561c /drivers/gpu/drm/i915/gvt | |
| parent | drm/i915/gvt: Fix function comment doc errors (diff) | |
| download | kernel-qcow2-linux-69ca5af4ff9a3ff96e4595c2b7522c01a2641779.tar.gz kernel-qcow2-linux-69ca5af4ff9a3ff96e4595c2b7522c01a2641779.tar.xz kernel-qcow2-linux-69ca5af4ff9a3ff96e4595c2b7522c01a2641779.zip | |
drm/i915/gvt: Move some MMIO definitions to reg.h
To consolidate all gvt private MMIO definition in one place,
this moves some not yet used in i915 to reg.h.
Reviewed-by: Hang Yuan <hang.yuan@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt')
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/mmio_context.c | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/reg.h | 9 |
2 files changed, 9 insertions, 13 deletions
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c index 20be9a92600f..d20f2c9bda82 100644 --- a/drivers/gpu/drm/i915/gvt/mmio_context.c +++ b/drivers/gpu/drm/i915/gvt/mmio_context.c @@ -37,19 +37,6 @@ #include "gvt.h" #include "trace.h" -/** - * Defined in Intel Open Source PRM. - * Ref: https://01.org/linuxgraphics/documentation/hardware-specification-prms - */ -#define TRVATTL3PTRDW(i) _MMIO(0x4de0 + (i)*4) -#define TRNULLDETCT _MMIO(0x4de8) -#define TRINVTILEDETCT _MMIO(0x4dec) -#define TRVADR _MMIO(0x4df0) -#define TRTTE _MMIO(0x4df4) -#define RING_EXCC(base) _MMIO((base) + 0x28) -#define RING_GFX_MODE(base) _MMIO((base) + 0x29c) -#define VF_GUARDBAND _MMIO(0x83a4) - #define GEN9_MOCS_SIZE 64 /* Raw offset is appened to each line for convenience. */ diff --git a/drivers/gpu/drm/i915/gvt/reg.h b/drivers/gpu/drm/i915/gvt/reg.h index d4f7ce6dc1d7..60dcc6bb8425 100644 --- a/drivers/gpu/drm/i915/gvt/reg.h +++ b/drivers/gpu/drm/i915/gvt/reg.h @@ -77,4 +77,13 @@ #define _RING_CTL_BUF_SIZE(ctl) (((ctl) & RB_TAIL_SIZE_MASK) + \ I915_GTT_PAGE_SIZE) +#define TRVATTL3PTRDW(i) _MMIO(0x4de0 + (i) * 4) +#define TRNULLDETCT _MMIO(0x4de8) +#define TRINVTILEDETCT _MMIO(0x4dec) +#define TRVADR _MMIO(0x4df0) +#define TRTTE _MMIO(0x4df4) +#define RING_EXCC(base) _MMIO((base) + 0x28) +#define RING_GFX_MODE(base) _MMIO((base) + 0x29c) +#define VF_GUARDBAND _MMIO(0x83a4) + #endif |