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| author | Xinyun Liu | 2018-09-19 09:28:30 +0200 |
|---|---|---|
| committer | Zhenyu Wang | 2018-12-07 05:00:30 +0100 |
| commit | d58b33638c99ae63c57ad86d8f9f34abac163c1e (patch) | |
| tree | 3ce4999b3c17e36e0803091acd5d1a7c9adfa614 /drivers/gpu/drm/i915/gvt | |
| parent | drm/i915/gvt: update force-to-nonpriv register whitelist (diff) | |
| download | kernel-qcow2-linux-d58b33638c99ae63c57ad86d8f9f34abac163c1e.tar.gz kernel-qcow2-linux-d58b33638c99ae63c57ad86d8f9f34abac163c1e.tar.xz kernel-qcow2-linux-d58b33638c99ae63c57ad86d8f9f34abac163c1e.zip | |
drm/i915/gvt: fix typo in two MI cmd annotation
s/ME_SEMAPHORE_/MI_SEMAPHORE_
Signed-off-by: Xinyun Liu <xinyun.liu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt')
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/cmd_parser.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c index 77edbfcb0f75..77ae634eb11c 100644 --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c @@ -1900,11 +1900,11 @@ static struct cmd_info cmd_info[] = { {"MI_URB_CLEAR", OP_MI_URB_CLEAR, F_LEN_VAR, R_RCS, D_ALL, 0, 8, NULL}, - {"ME_SEMAPHORE_SIGNAL", OP_MI_SEMAPHORE_SIGNAL, F_LEN_VAR, R_ALL, + {"MI_SEMAPHORE_SIGNAL", OP_MI_SEMAPHORE_SIGNAL, F_LEN_VAR, R_ALL, D_BDW_PLUS, 0, 8, NULL}, - {"ME_SEMAPHORE_WAIT", OP_MI_SEMAPHORE_WAIT, F_LEN_VAR, R_ALL, D_BDW_PLUS, - ADDR_FIX_1(2), 8, cmd_handler_mi_semaphore_wait}, + {"MI_SEMAPHORE_WAIT", OP_MI_SEMAPHORE_WAIT, F_LEN_VAR, R_ALL, + D_BDW_PLUS, ADDR_FIX_1(2), 8, cmd_handler_mi_semaphore_wait}, {"MI_STORE_DATA_IMM", OP_MI_STORE_DATA_IMM, F_LEN_VAR, R_ALL, D_BDW_PLUS, ADDR_FIX_1(1), 10, cmd_handler_mi_store_data_imm}, |