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| author | Ben Widawsky | 2012-06-04 23:42:41 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2012-06-14 17:36:16 +0200 |
| commit | fe1cc68fcb11ca14f420068d1806eb5e719ac772 (patch) | |
| tree | 29a6f05aa084b85b6a9816498b040d8b6296cf0a /drivers/gpu/drm/i915/i915_dma.c | |
| parent | drm/i915: ignore pipe select bit when checking for LVDS register initialization (diff) | |
| download | kernel-qcow2-linux-fe1cc68fcb11ca14f420068d1806eb5e719ac772.tar.gz kernel-qcow2-linux-fe1cc68fcb11ca14f420068d1806eb5e719ac772.tar.xz kernel-qcow2-linux-fe1cc68fcb11ca14f420068d1806eb5e719ac772.zip | |
drm/i915: CXT_SIZE register offsets added
The GPUs can have different default context layouts, and the sizes could
vary based on platform or BIOS. In order to back the context object with
a properly sized BO, we must read this register in order to find out a
sufficient size.
Thankfully (sarcarm!), the register moves and changes meanings
throughout generations.
CTX and CXT differences are intentional as that is how it is in the
documentation (prior to GEN6 it was CXT).
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_dma.c')
0 files changed, 0 insertions, 0 deletions