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| author | Eugeni Dodonov | 2012-05-09 20:37:24 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2012-05-19 22:39:49 +0200 |
| commit | 1f8eeabf2e6f4a6cb5afe9e90d2a705e9709f1a1 (patch) | |
| tree | 47fe6297ab6872b5d3491474f2e86b6b3683c3b9 /drivers/gpu/drm/i915/i915_drv.h | |
| parent | drm/i915: define Haswell watermarks and clock gating (diff) | |
| download | kernel-qcow2-linux-1f8eeabf2e6f4a6cb5afe9e90d2a705e9709f1a1.tar.gz kernel-qcow2-linux-1f8eeabf2e6f4a6cb5afe9e90d2a705e9709f1a1.tar.xz kernel-qcow2-linux-1f8eeabf2e6f4a6cb5afe9e90d2a705e9709f1a1.zip | |
drm/i915: program WM_LINETIME on Haswell
The line time can be programmed according to the number of horizontal
pixels vs effective pixel rate ratio.
v2: improve comment as per Chris Wilson suggestion
v3: incorporate latest changes in specs.
v4: move into wm update routine, also mention that the same routine can
program IPS watermarks. We do not have their enablement code yet, nor
handle the required clock settings at the moment, so this patch won't
program those values for now.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index e03a4f80c5c9..83a557c7bcc5 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -243,6 +243,8 @@ struct drm_i915_display_funcs { void (*update_sprite_wm)(struct drm_device *dev, int pipe, uint32_t sprite_width, int pixel_size); void (*sanitize_pm)(struct drm_device *dev); + void (*update_linetime_wm)(struct drm_device *dev, int pipe, + struct drm_display_mode *mode); int (*crtc_mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, |