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authorPaulo Zanoni2013-12-13 18:22:32 +0100
committerDaniel Vetter2013-12-14 15:36:03 +0100
commitdf4547d82589714f1b0cecd93569130a452cbf46 (patch)
treedb80471f787e3fa61f61824b08a753cd01b6ba0c /drivers/gpu/drm/i915/i915_drv.h
parentdrm/i915: release the GTT mmaps when going into D3 (diff)
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drm/i915: add runtime PM support on Haswell
Now that all the infrastructure is in place and all the tests from pm_pc8 pass, we can finally enable the feature. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9e4b5ca6ee72..67f2ca1e50e0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1848,7 +1848,7 @@ struct drm_i915_file_private {
#define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev))
#define HAS_PC8(dev) (IS_HASWELL(dev)) /* XXX HSW:ULX */
-#define HAS_RUNTIME_PM(dev) false
+#define HAS_RUNTIME_PM(dev) (IS_HASWELL(dev))
#define INTEL_PCH_DEVICE_ID_MASK 0xff00
#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00