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| author | Zhenyu Wang | 2009-06-08 08:40:19 +0200 |
|---|---|---|
| committer | Eric Anholt | 2009-06-09 20:15:27 +0200 |
| commit | 036a4a7d9272582fc7370359515d807393e2f728 (patch) | |
| tree | 1f6be44c18dd9823155e60d9bc53260a41b40630 /drivers/gpu/drm/i915/i915_gem.c | |
| parent | drm/i915: enable MCHBAR if needed (diff) | |
| download | kernel-qcow2-linux-036a4a7d9272582fc7370359515d807393e2f728.tar.gz kernel-qcow2-linux-036a4a7d9272582fc7370359515d807393e2f728.tar.xz kernel-qcow2-linux-036a4a7d9272582fc7370359515d807393e2f728.zip | |
drm/i915: handle interrupt on new chipset
Update interrupt handling methods for IGDNG with new registers
for display and graphics interrupt functions. As we won't use
irq-based vblank sync in dri2, so display interrupt on new chip
will be used for hotplug only in future.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 3fbd8a0c40d1..38e0f8301a14 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1714,7 +1714,10 @@ i915_wait_request(struct drm_device *dev, uint32_t seqno) BUG_ON(seqno == 0); if (!i915_seqno_passed(i915_get_gem_seqno(dev), seqno)) { - ier = I915_READ(IER); + if (IS_IGDNG(dev)) + ier = I915_READ(DEIER) | I915_READ(GTIER); + else + ier = I915_READ(IER); if (!ier) { DRM_ERROR("something (likely vbetool) disabled " "interrupts, re-enabling\n"); |