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| author | Chris Wilson | 2016-09-09 15:12:01 +0200 |
|---|---|---|
| committer | Chris Wilson | 2016-09-09 15:23:08 +0200 |
| commit | 851ba2d6977d6ada31366ae0b791a69132f2c8a7 (patch) | |
| tree | e7ccecb2ba55513cf4664939bd700a7347a8e79e /drivers/gpu/drm/i915/i915_gem_execbuffer.c | |
| parent | drm/i915: Nonblocking request submission (diff) | |
| download | kernel-qcow2-linux-851ba2d6977d6ada31366ae0b791a69132f2c8a7.tar.gz kernel-qcow2-linux-851ba2d6977d6ada31366ae0b791a69132f2c8a7.tar.xz kernel-qcow2-linux-851ba2d6977d6ada31366ae0b791a69132f2c8a7.zip | |
drm/i915: Serialise execbuf operation after a dma-buf reservation object
Now that we can wait upon fences before emitting the request, it becomes
trivial to wait upon any implicit fence provided by the dma-buf
reservation object.
To protect against failure, we force any asynchronous waits on a foreign
fence to timeout after 10s - so that a stall in another driver does not
permanently cripple ourselves. Still unpleasant though!
Testcase: igt/prime_vgem/fence-wait
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: John Harrison <john.c.harrison@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20160909131201.16673-21-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_execbuffer.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_execbuffer.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index ccaf15ba4e32..33c85227643d 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1131,6 +1131,7 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req, list_for_each_entry(vma, vmas, exec_list) { struct drm_i915_gem_object *obj = vma->obj; + struct reservation_object *resv; if (obj->flags & other_rings) { ret = i915_gem_request_await_object @@ -1139,6 +1140,16 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req, return ret; } + resv = i915_gem_object_get_dmabuf_resv(obj); + if (resv) { + ret = i915_sw_fence_await_reservation + (&req->submit, resv, &i915_fence_ops, + obj->base.pending_write_domain, 10*HZ, + GFP_KERNEL | __GFP_NOWARN); + if (ret < 0) + return ret; + } + if (obj->base.write_domain & I915_GEM_DOMAIN_CPU) i915_gem_clflush_object(obj, false); } |