summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_gem_execbuffer.c
diff options
context:
space:
mode:
authorChris Wilson2017-09-06 17:28:59 +0200
committerChris Wilson2017-09-06 18:36:30 +0200
commit90cad095eeaa43711d60066096cddaf0d3b58bf6 (patch)
tree4c368d32140891a2bc8132a08a2fb1f374bf4b5d /drivers/gpu/drm/i915/i915_gem_execbuffer.c
parentdrm/i915: Re-enable GTT following a device reset (diff)
downloadkernel-qcow2-linux-90cad095eeaa43711d60066096cddaf0d3b58bf6.tar.gz
kernel-qcow2-linux-90cad095eeaa43711d60066096cddaf0d3b58bf6.tar.xz
kernel-qcow2-linux-90cad095eeaa43711d60066096cddaf0d3b58bf6.zip
drm/i915: Disable MI_STORE_DATA_IMM for i915g/i915gm
The early gen3 machines (i915g/Grantsdale and i915gm/Alviso) share a lot of characteristics in their MI/GTT blocks with gen2, and in particular can only use physical addresses in MI_STORE_DATA_IMM. This makes it incompatible with our usage, so include those two machines in the blacklist to prevent usage. v2: Make it easy for gcc and rewrite it as a switch to save some space. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20170906152859.5304-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_execbuffer.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_execbuffer.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 53718a245ded..7687483ff218 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1168,6 +1168,9 @@ static u32 *reloc_gpu(struct i915_execbuffer *eb,
if (eb_use_cmdparser(eb))
return ERR_PTR(-EWOULDBLOCK);
+ if (!intel_engine_can_store_dword(eb->engine))
+ return ERR_PTR(-ENODEV);
+
err = __reloc_gpu_alloc(eb, vma, len);
if (unlikely(err))
return ERR_PTR(err);
@@ -1192,9 +1195,7 @@ relocate_entry(struct i915_vma *vma,
if (!eb->reloc_cache.vaddr &&
(DBG_FORCE_RELOC == FORCE_GPU_RELOC ||
- !reservation_object_test_signaled_rcu(vma->resv, true)) &&
- __intel_engine_can_store_dword(eb->reloc_cache.gen,
- eb->engine->class)) {
+ !reservation_object_test_signaled_rcu(vma->resv, true))) {
const unsigned int gen = eb->reloc_cache.gen;
unsigned int len;
u32 *batch;