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| author | Ben Widawsky | 2013-12-06 23:11:16 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2013-12-18 15:31:26 +0100 |
| commit | 9f273d48aa98cd193b19db9bb4c16bfb81c39052 (patch) | |
| tree | cbe2ec870bd7f1927c5698f44049a6027df6db4e /drivers/gpu/drm/i915/i915_gem_gtt.c | |
| parent | drm/i915: Add VM to context (diff) | |
| download | kernel-qcow2-linux-9f273d48aa98cd193b19db9bb4c16bfb81c39052.tar.gz kernel-qcow2-linux-9f273d48aa98cd193b19db9bb4c16bfb81c39052.tar.xz kernel-qcow2-linux-9f273d48aa98cd193b19db9bb4c16bfb81c39052.zip | |
drm/i915: Write PDEs at init instead of enable
We won't be calling enable() for all PPGTTs. We do need to write PDEs
for all PPGTTs however. By moving the writing to init (which is called
for all PPGTTs) we should accomplish this.
ADD NOTE ABOUT PDE restore
TODO: Eventually, we should allocate the page tables on demand.
v2: Rebased on BDW. Only do PDEs for pre-gen8
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_gtt.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_gtt.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index bd9228888aeb..2c0779580b1e 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -631,8 +631,6 @@ static int gen7_ppgtt_enable(struct i915_hw_ppgtt *ppgtt) uint32_t ecochk, ecobits; int i; - gen6_write_pdes(ppgtt); - ecobits = I915_READ(GAC_ECO_BITS); I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_PPGTT_CACHE64B); @@ -666,8 +664,6 @@ static int gen6_ppgtt_enable(struct i915_hw_ppgtt *ppgtt) uint32_t ecochk, gab_ctl, ecobits; int i; - gen6_write_pdes(ppgtt); - ecobits = I915_READ(GAC_ECO_BITS); I915_WRITE(GAC_ECO_BITS, ecobits | ECOBITS_SNB_BIT | ECOBITS_PPGTT_CACHE64B); @@ -906,6 +902,8 @@ int i915_gem_init_ppgtt(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt) kref_init(&ppgtt->ref); drm_mm_init(&ppgtt->base.mm, ppgtt->base.start, ppgtt->base.total); + if (INTEL_INFO(dev)->gen < 8) + gen6_write_pdes(ppgtt); } return ret; @@ -1059,6 +1057,9 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev) vma->bind_vma(vma, obj->cache_level, GLOBAL_BIND); } + if (dev_priv->mm.aliasing_ppgtt) + gen6_write_pdes(dev_priv->mm.aliasing_ppgtt); + i915_gem_chipset_flush(dev); } |