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| author | Chris Wilson | 2014-10-24 13:11:11 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2014-11-07 18:42:01 +0100 |
| commit | 70f2f5c70440feff01d9ba7c8b4432eb72bd69eb (patch) | |
| tree | 5458fc2d3b963654130a4fc684daa036fefbceff /drivers/gpu/drm/i915/i915_gem_tiling.c | |
| parent | drm/i915: Request PIN_GLOBAL when pinning a vma for GTT relocations (diff) | |
| download | kernel-qcow2-linux-70f2f5c70440feff01d9ba7c8b4432eb72bd69eb.tar.gz kernel-qcow2-linux-70f2f5c70440feff01d9ba7c8b4432eb72bd69eb.tar.xz kernel-qcow2-linux-70f2f5c70440feff01d9ba7c8b4432eb72bd69eb.zip | |
drm/i915: Report the actual swizzling back to userspace
Userspace cares about whether or not swizzling depends on the page
address for its direct access into bound objects. Extend the get_tiling
ioctl to report the physical swizzling value in addition to the logical
swizzling value so that userspace can accurately determine when it is
possible for manual detiling.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Akash Goel <akash.goel@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Testcase: igt/gem_tiled_wc
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_tiling.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_tiling.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index d1e7a3e088aa..749ab485569e 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -458,6 +458,7 @@ i915_gem_get_tiling(struct drm_device *dev, void *data, } /* Hide bit 17 from the user -- see comment in i915_gem_set_tiling */ + args->phys_swizzle_mode = args->swizzle_mode; if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_17) args->swizzle_mode = I915_BIT_6_SWIZZLE_9; if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_10_17) |