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| author | Chris Wilson | 2010-10-21 15:57:17 +0200 |
|---|---|---|
| committer | Chris Wilson | 2010-10-21 20:08:39 +0200 |
| commit | f00a3ddf91d596bece5fa31e8ce2e8a3b4c0623b (patch) | |
| tree | cae4beb61a2ae44ffa6d892bbd207b4022094dc2 /drivers/gpu/drm/i915/i915_gem_tiling.c | |
| parent | drm/i915: Enable SandyBridge blitter ring (diff) | |
| download | kernel-qcow2-linux-f00a3ddf91d596bece5fa31e8ce2e8a3b4c0623b.tar.gz kernel-qcow2-linux-f00a3ddf91d596bece5fa31e8ce2e8a3b4c0623b.tar.xz kernel-qcow2-linux-f00a3ddf91d596bece5fa31e8ce2e8a3b4c0623b.zip | |
drm/i915: IS_IRONLAKE is synonymous with gen == 5
So remove the redundant bit in the capabilities block and
s/IS_IRONLAKE/IS_GEN5/.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_tiling.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_tiling.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index 8c9ffc4768ee..af352de70be1 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -92,7 +92,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev) uint32_t swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN; uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN; - if (IS_IRONLAKE(dev) || IS_GEN6(dev)) { + if (IS_GEN5(dev) || IS_GEN6(dev)) { /* On Ironlake whatever DRAM config, GPU always do * same swizzling setup. */ |