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| author | Ville Syrjälä | 2014-10-31 10:53:06 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2014-11-07 18:41:56 +0100 |
| commit | 5eba929d1bb8fb662594b44d02f54fbaa7557a3b (patch) | |
| tree | 7e7f4bad0a23b4921d4feece704e0b8d9cf647d6 /drivers/gpu/drm/i915/i915_irq.c | |
| parent | drm/i915: Drop useless VLV_IIR writes from vlv_display_irq_postinstall() (diff) | |
| download | kernel-qcow2-linux-5eba929d1bb8fb662594b44d02f54fbaa7557a3b.tar.gz kernel-qcow2-linux-5eba929d1bb8fb662594b44d02f54fbaa7557a3b.tar.xz kernel-qcow2-linux-5eba929d1bb8fb662594b44d02f54fbaa7557a3b.zip | |
drm/i915: Kill leftover GTIIR writes from valleyview_irq_preinstall()
There are two leftover GTIIR writes in valleyview_irq_preinstall().
Looks like the were originally left behind by:
commit d18ea1b58a5003eb6fca03aff03c4c01321e6cb1
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Fri Jul 12 22:43:25 2013 +0200
drm/i915: unify PM interrupt preinstall sequence
and then the GTIIR reset was added back here:
commit f86f3fb005d0c907285fa8685badcb24ec31ee59
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date: Tue Apr 1 15:37:14 2014 -0300
drm/i915: properly clear IIR at irq_uninstall on Gen5+
so we can kill the leftovers from the vlv code.
Cc: Paulo Zanoni <przanoni@gmail.com>
Suggested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index f2a45f14ab44..318a6a0724d0 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3128,10 +3128,6 @@ static void valleyview_irq_preinstall(struct drm_device *dev) I915_WRITE(RING_IMR(GEN6_BSD_RING_BASE), 0); I915_WRITE(RING_IMR(BLT_RING_BASE), 0); - /* and GT */ - I915_WRITE(GTIIR, I915_READ(GTIIR)); - I915_WRITE(GTIIR, I915_READ(GTIIR)); - gen5_gt_irq_reset(dev); I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK); |