diff options
| author | Ville Syrjälä | 2014-10-30 18:42:50 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2014-11-07 18:41:51 +0100 |
| commit | 7d1bd53931e5afe5b2549c045ed4afad71ee6e8f (patch) | |
| tree | f5acab22780d89cdbb137f6f303088810fdd07ec /drivers/gpu/drm/i915/i915_irq.c | |
| parent | drm/i915: Make intel_pin_and_fence_fb_obj take plane and framebuffer (diff) | |
| download | kernel-qcow2-linux-7d1bd53931e5afe5b2549c045ed4afad71ee6e8f.tar.gz kernel-qcow2-linux-7d1bd53931e5afe5b2549c045ed4afad71ee6e8f.tar.xz kernel-qcow2-linux-7d1bd53931e5afe5b2549c045ed4afad71ee6e8f.zip | |
drm/i915: Apply some ocd for IMR vs. IER order during irq enable
When disabling interrupts we do the writes in this order:
IMR,IER,IIR,IIR. But when enabling interrupts we don't do use the
mirrored order, and instead do IIR,IIR,IMR,IER.
I like consistency unless there's a good reason against it, which I
can't think of here, so change the enable order to IIR,IIR,IER,IMR.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index a2b013d97fb6..98a8d650768b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -126,16 +126,16 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */ #define GEN8_IRQ_INIT_NDX(type, which, imr_val, ier_val) do { \ GEN5_ASSERT_IIR_IS_ZERO(GEN8_##type##_IIR(which)); \ - I915_WRITE(GEN8_##type##_IMR(which), (imr_val)); \ I915_WRITE(GEN8_##type##_IER(which), (ier_val)); \ - POSTING_READ(GEN8_##type##_IER(which)); \ + I915_WRITE(GEN8_##type##_IMR(which), (imr_val)); \ + POSTING_READ(GEN8_##type##_IMR(which)); \ } while (0) #define GEN5_IRQ_INIT(type, imr_val, ier_val) do { \ GEN5_ASSERT_IIR_IS_ZERO(type##IIR); \ - I915_WRITE(type##IMR, (imr_val)); \ I915_WRITE(type##IER, (ier_val)); \ - POSTING_READ(type##IER); \ + I915_WRITE(type##IMR, (imr_val)); \ + POSTING_READ(type##IMR); \ } while (0) /* For display hotplug interrupt */ |