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| author | Ville Syrjälä | 2016-02-19 19:47:30 +0100 |
|---|---|---|
| committer | Ville Syrjälä | 2016-02-22 18:28:13 +0100 |
| commit | aae8ba844495473cb11298ad263e26e656e6e4b4 (patch) | |
| tree | 5b36bb6882c812ae29e1ad8e5f6fd6578f03339d /drivers/gpu/drm/i915/i915_irq.c | |
| parent | drm/i915: synchronize_irq() before turning off disp2d power well on VLV/CHV (diff) | |
| download | kernel-qcow2-linux-aae8ba844495473cb11298ad263e26e656e6e4b4.tar.gz kernel-qcow2-linux-aae8ba844495473cb11298ad263e26e656e6e4b4.tar.xz kernel-qcow2-linux-aae8ba844495473cb11298ad263e26e656e6e4b4.zip | |
drm/i915: Make sure pipe interrupts are processed before turning off power well on BDW+
Starting from BDW the DE_PIPE interrupts for pipe B and C belong to the
relevant display power well. So we should make sure we've finished
processing them before turning off the power well.
The pipe interrupts shouldn't really happen at this point anymore since
we've already shut down the planes/pipes/whatnot, but being a bit
paranoid shouldn't hurt.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455907651-16397-1-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index d56c261ad867..a9048e1b96e5 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3366,6 +3366,22 @@ void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv, spin_unlock_irq(&dev_priv->irq_lock); } +void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv, + unsigned int pipe_mask) +{ + spin_lock_irq(&dev_priv->irq_lock); + if (pipe_mask & 1 << PIPE_A) + GEN8_IRQ_RESET_NDX(DE_PIPE, PIPE_A); + if (pipe_mask & 1 << PIPE_B) + GEN8_IRQ_RESET_NDX(DE_PIPE, PIPE_B); + if (pipe_mask & 1 << PIPE_C) + GEN8_IRQ_RESET_NDX(DE_PIPE, PIPE_C); + spin_unlock_irq(&dev_priv->irq_lock); + + /* make sure we're done processing display irqs */ + synchronize_irq(dev_priv->dev->irq); +} + static void cherryview_irq_preinstall(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; |