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| author | Ben Widawsky | 2013-07-04 20:02:04 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2013-07-16 08:00:52 +0200 |
| commit | 05e21cc43da5a1a58b34a2cfad13d22bcfeb1f2b (patch) | |
| tree | 4c1feabc9ece2b2566f3d0d52d1fc56575f96e5b /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915/hsw: Set correct Haswell PTE encodings. (diff) | |
| download | kernel-qcow2-linux-05e21cc43da5a1a58b34a2cfad13d22bcfeb1f2b.tar.gz kernel-qcow2-linux-05e21cc43da5a1a58b34a2cfad13d22bcfeb1f2b.tar.xz kernel-qcow2-linux-05e21cc43da5a1a58b34a2cfad13d22bcfeb1f2b.zip | |
drm/i915: Define some of the eLLC magic
The EDRAM present register isn't really defined in the docs. It just
says check to see if it's set to 1. So I haven't defined the 1 value not
knowing what it actually means.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index dc3d6a74f391..5e58a44c5fe3 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4472,6 +4472,10 @@ #define GT_FIFO_FREE_ENTRIES 0x120008 #define GT_FIFO_NUM_RESERVED_ENTRIES 20 +#define HSW_IDICR 0x9008 +#define IDIHASHMSK(x) (((x) & 0x3f) << 16) +#define HSW_EDRAM_PRESENT 0x120010 + #define GEN6_UCGCTL1 0x9400 # define GEN6_BLBUNIT_CLOCK_GATE_DISABLE (1 << 5) # define GEN6_CSUNIT_CLOCK_GATE_DISABLE (1 << 7) |