diff options
| author | James Ausmus | 2018-03-28 23:57:56 +0200 |
|---|---|---|
| committer | Paulo Zanoni | 2018-04-27 22:40:09 +0200 |
| commit | 077ef1f09c2528b81366ae9a2a969ea35c475027 (patch) | |
| tree | a0ca5d72dcf7611c42c586b7148cc8e88d4bc650 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915/glk: Add MODULE_FIRMWARE for Geminilake (diff) | |
| download | kernel-qcow2-linux-077ef1f09c2528b81366ae9a2a969ea35c475027.tar.gz kernel-qcow2-linux-077ef1f09c2528b81366ae9a2a969ea35c475027.tar.xz kernel-qcow2-linux-077ef1f09c2528b81366ae9a2a969ea35c475027.zip | |
drm/i915/icl: Don't set pipe CSC/Gamma in PLANE_COLOR_CTL
These fields have been deprecated and moved in ICL+. Stop setting the
bits.
They have moved to GAMMA_MODE and CSC_MODE, respectively. This patch
is just to stop incorrectly setting bits in PLANE_COLOR_CTL while
we're waiting for the new replacement functionality to be done.
v2: Drop useless comment, and change !(GEN >= 11) to (GEN < 11). (Ville)
v3: No changes
v4 (from Paulo): Rebase.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180328215803.13835-2-paulo.r.zanoni@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 391825ae2361..8c322ff1c3e4 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6407,9 +6407,9 @@ enum { #define _PLANE_COLOR_CTL_1_A 0x701CC /* GLK+ */ #define _PLANE_COLOR_CTL_2_A 0x702CC /* GLK+ */ #define _PLANE_COLOR_CTL_3_A 0x703CC /* GLK+ */ -#define PLANE_COLOR_PIPE_GAMMA_ENABLE (1 << 30) +#define PLANE_COLOR_PIPE_GAMMA_ENABLE (1 << 30) /* Pre-ICL */ #define PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE (1 << 28) -#define PLANE_COLOR_PIPE_CSC_ENABLE (1 << 23) +#define PLANE_COLOR_PIPE_CSC_ENABLE (1 << 23) /* Pre-ICL */ #define PLANE_COLOR_CSC_MODE_BYPASS (0 << 17) #define PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709 (1 << 17) #define PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709 (2 << 17) |