diff options
| author | Wu Fengguang | 2011-12-09 13:42:18 +0100 |
|---|---|---|
| committer | Keith Packard | 2011-12-20 04:15:47 +0100 |
| commit | 1202b4c6782e57a71c4b162a51a4e7ad8402a950 (patch) | |
| tree | 04efbec349925d70ef1a93322509406007bddddf /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: fix ELD writing for SandyBridge (diff) | |
| download | kernel-qcow2-linux-1202b4c6782e57a71c4b162a51a4e7ad8402a950.tar.gz kernel-qcow2-linux-1202b4c6782e57a71c4b162a51a4e7ad8402a950.tar.xz kernel-qcow2-linux-1202b4c6782e57a71c4b162a51a4e7ad8402a950.zip | |
drm/i915: rename audio ELD registers
Change the definitions from GEN5 to IBX as they aren't in the CPU and
some SNB systems actually shipped with IBX chipsets (or, at least that's
a supported configuration).
The GEN7_* register addresses actually take effect since GEN6 and should
be prefixed by CPT, the PCH code name.
Suggested-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a26d5b0a3690..771a05880f19 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3569,17 +3569,17 @@ #define G4X_ELD_ACK (1 << 4) #define G4X_HDMIW_HDMIEDID 0x6210C -#define GEN5_HDMIW_HDMIEDID_A 0xE2050 -#define GEN5_AUD_CNTL_ST_A 0xE20B4 -#define GEN5_ELD_BUFFER_SIZE (0x1f << 10) -#define GEN5_ELD_ADDRESS (0x1f << 5) -#define GEN5_ELD_ACK (1 << 4) -#define GEN5_AUD_CNTL_ST2 0xE20C0 -#define GEN5_ELD_VALIDB (1 << 0) -#define GEN5_CP_READYB (1 << 1) - -#define GEN7_HDMIW_HDMIEDID_A 0xE5050 -#define GEN7_AUD_CNTRL_ST_A 0xE50B4 -#define GEN7_AUD_CNTRL_ST2 0xE50C0 +#define IBX_HDMIW_HDMIEDID_A 0xE2050 +#define IBX_AUD_CNTL_ST_A 0xE20B4 +#define IBX_ELD_BUFFER_SIZE (0x1f << 10) +#define IBX_ELD_ADDRESS (0x1f << 5) +#define IBX_ELD_ACK (1 << 4) +#define IBX_AUD_CNTL_ST2 0xE20C0 +#define IBX_ELD_VALIDB (1 << 0) +#define IBX_CP_READYB (1 << 1) + +#define CPT_HDMIW_HDMIEDID_A 0xE5050 +#define CPT_AUD_CNTL_ST_A 0xE50B4 +#define CPT_AUD_CNTRL_ST2 0xE50C0 #endif /* _I915_REG_H_ */ |